forked from forks/qmk_firmware
160 lines
6.5 KiB
C
160 lines
6.5 KiB
C
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/* Copyright (C) 2011 Circuits At Home, LTD. All rights reserved.
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This software may be distributed and modified under the terms of the GNU
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General Public License version 2 (GPL2) as published by the Free Software
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Foundation and appearing in the file GPL2.TXT included in the packaging of
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this file. Please note that GPL2 Section 2[b] requires that all works based
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on this software must also be made publicly available under the terms of
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the GPL2 ("Copyleft").
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Contact information
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-------------------
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Circuits At Home, LTD
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Web : http://www.circuitsathome.com
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e-mail : support@circuitsathome.com
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*/
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#if !defined(__CDCPROLIFIC_H__)
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#define __CDCPROLIFIC_H__
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#include "cdcacm.h"
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//#define PL2303_COMPAT // Uncomment it if you have compatibility problems
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#define PL_VID 0x067B
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#define CHECK_PID(pid) ( pid != 0x2303 && pid != 0x0609 )
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//#define PL_PID 0x0609
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#define PROLIFIC_REV_H 0x0202
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#define PROLIFIC_REV_X 0x0300
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#define PROLIFIC_REV_HX_CHIP_D 0x0400
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#define PROLIFIC_REV_1 0x0001
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#define kXOnChar '\x11'
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#define kXOffChar '\x13'
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#define SPECIAL_SHIFT (5)
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#define SPECIAL_MASK ((1<<SPECIAL_SHIFT) - 1)
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#define STATE_ALL ( PD_RS232_S_MASK | PD_S_MASK )
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#define FLOW_RX_AUTO ( PD_RS232_A_RFR | PD_RS232_A_DTR | PD_RS232_A_RXO )
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#define FLOW_TX_AUTO ( PD_RS232_A_CTS | PD_RS232_A_DSR | PD_RS232_A_TXO | PD_RS232_A_DCD )
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#define CAN_BE_AUTO ( FLOW_RX_AUTO | FLOW_TX_AUTO )
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#define CAN_NOTIFY ( PD_RS232_N_MASK )
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#define EXTERNAL_MASK ( PD_S_MASK | (PD_RS232_S_MASK & ~PD_RS232_S_LOOP) )
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#define INTERNAL_DELAY ( PD_RS232_S_LOOP )
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#define DEFAULT_AUTO ( PD_RS232_A_DTR | PD_RS232_A_RFR | PD_RS232_A_CTS | PD_RS232_A_DSR )
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#define DEFAULT_NOTIFY 0x00
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#define DEFAULT_STATE ( PD_S_TX_ENABLE | PD_S_RX_ENABLE | PD_RS232_A_TXO | PD_RS232_A_RXO )
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#define CONTINUE_SEND 1
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#define PAUSE_SEND 2
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#define kRxAutoFlow ((UInt32)( PD_RS232_A_RFR | PD_RS232_A_DTR | PD_RS232_A_RXO ))
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#define kTxAutoFlow ((UInt32)( PD_RS232_A_CTS | PD_RS232_A_DSR | PD_RS232_A_TXO | PD_RS232_A_DCD ))
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#define kControl_StateMask ((UInt32)( PD_RS232_S_CTS | PD_RS232_S_DSR | PD_RS232_S_CAR | PD_RS232_S_RI ))
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#define kRxQueueState ((UInt32)( PD_S_RXQ_EMPTY | PD_S_RXQ_LOW_WATER | PD_S_RXQ_HIGH_WATER | PD_S_RXQ_FULL ))
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#define kTxQueueState ((UInt32)( PD_S_TXQ_EMPTY | PD_S_TXQ_LOW_WATER | PD_S_TXQ_HIGH_WATER | PD_S_TXQ_FULL ))
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#define kCONTROL_DTR 0x01
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#define kCONTROL_RTS 0x02
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#define kStateTransientMask 0x74
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#define kBreakError 0x04
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#define kFrameError 0x10
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#define kParityError 0x20
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#define kOverrunError 0x40
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#define kCTS 0x80
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#define kDSR 0x02
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#define kRI 0x08
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#define kDCD 0x01
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#define kHandshakeInMask ((UInt32)( PD_RS232_S_CTS | PD_RS232_S_DSR | PD_RS232_S_CAR | PD_RS232_S_RI ))
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#define VENDOR_WRITE_REQUEST_TYPE 0x40
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#define VENDOR_WRITE_REQUEST 0x01
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#define VENDOR_READ_REQUEST_TYPE 0xc0
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#define VENDOR_READ_REQUEST 0x01
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// Device Configuration Registers (DCR0, DCR1, DCR2)
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#define SET_DCR0 0x00
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#define GET_DCR0 0x80
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#define DCR0_INIT 0x01
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#define DCR0_INIT_H 0x41
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#define DCR0_INIT_X 0x61
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#define SET_DCR1 0x01
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#define GET_DCR1 0x81
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#define DCR1_INIT_H 0x80
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#define DCR1_INIT_X 0x00
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#define SET_DCR2 0x02
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#define GET_DCR2 0x82
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#define DCR2_INIT_H 0x24
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#define DCR2_INIT_X 0x44
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// On-chip Data Buffers:
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#define RESET_DOWNSTREAM_DATA_PIPE 0x08
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#define RESET_UPSTREAM_DATA_PIPE 0x09
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#define PL_MAX_ENDPOINTS 4
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enum tXO_State {
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kXOnSent = -2,
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kXOffSent = -1,
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kXO_Idle = 0,
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kXOffNeeded = 1,
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kXOnNeeded = 2
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};
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enum pl2303_type {
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unknown,
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type_0, /* don't know the difference between type 0 and */
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type_1, /* type 1, until someone from prolific tells us... */
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rev_X,
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rev_HX, /* HX version of the pl2303 chip */
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rev_H
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};
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class PL2303 : public ACM {
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uint16_t wPLType; // Type of chip
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public:
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PL2303(USB *pusb, CDCAsyncOper *pasync);
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// USBDeviceConfig implementation
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uint8_t Init(uint8_t parent, uint8_t port, bool lowspeed);
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//virtual uint8_t Release();
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//virtual uint8_t Poll();
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//virtual uint8_t GetAddress() { return bAddress; };
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//// UsbConfigXtracter implementation
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//virtual void EndpointXtract(uint8_t conf, uint8_t iface, uint8_t alt, uint8_t proto, const USB_ENDPOINT_DESCRIPTOR *ep);
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#ifdef PL2303_COMPAT
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private:
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/* Prolific proprietary requests */
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uint8_t vendorRead( uint8_t val_lo, uint8_t val_hi, uint16_t index, uint8_t* buf );
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uint8_t vendorWrite( uint8_t val_lo, uint8_t val_hi, uint8_t index );
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#endif
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};
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#ifdef PL2303_COMPAT
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/* vendor read request */
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inline uint8_t PL2303::vendorRead( uint8_t val_lo, uint8_t val_hi, uint16_t index, uint8_t* buf )
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{
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return( pUsb->ctrlReq(bAddress, 0, VENDOR_READ_REQUEST_TYPE, VENDOR_READ_REQUEST, val_lo, val_hi, index, 1, 1, buf, NULL ));
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}
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/* vendor write request */
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inline uint8_t PL2303::vendorWrite( uint8_t val_lo, uint8_t val_hi, uint8_t index )
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{
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return( pUsb->ctrlReq(bAddress, 0, VENDOR_WRITE_REQUEST_TYPE, VENDOR_WRITE_REQUEST, val_lo, val_hi, index, 0, 0, NULL, NULL ));
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}
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#endif
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#endif // __CDCPROLIFIC_H__
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