forked from forks/qmk_firmware
138 lines
3.7 KiB
C
138 lines
3.7 KiB
C
// Copyright 2022 @sadekbaroudi (Sadek Baroudi)
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// Copyright 2023 @jasonhazel (Jason Hazel)
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// SPDX-License-Identifier: GPL-3.0-or-later
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#include "quantum.h"
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#include "spi_master.h"
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#include <string.h> /* memset */
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#include <unistd.h> /* close */
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#include "quantum.h"
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#include "matrix.h"
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#if (!defined(SHIFTREG_MATRIX_COL_CS))
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# error Missing shift register I/O pin definitions
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#endif
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int matrixArraySize = SHIFTREG_ROWS * sizeof(matrix_row_t);
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matrix_row_t oldMatrix[SHIFTREG_ROWS];
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#define SHIFTREG_OUTPUT_BITS 8
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pin_t rowPinsSR[SHIFTREG_ROWS] = MATRIX_ROW_PINS_SR;
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// semaphore to make sure SPI doesn't get called multiple times
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static bool shiftRegisterSPILocked = false;
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void semaphore_lock(bool value) {
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shiftRegisterSPILocked = value;
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}
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bool semaphore_is_locked(void) {
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return shiftRegisterSPILocked;
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}
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void sr_74hc595_spi_stop(void) {
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spi_stop();
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semaphore_lock(false);
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}
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bool sr_74hc595_spi_start(void) {
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if (!spi_start(SHIFTREG_MATRIX_COL_CS, false, 0, SHIFTREG_DIVISOR)) {
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dprintf("74hc595 matrix: failed to start spi\n");
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sr_74hc595_spi_stop();
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return false;
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}
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semaphore_lock(true);
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wait_us(1); // not sure if I need this
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return true;
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}
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bool sr_74hc595_spi_send_byte(uint8_t data) {
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sr_74hc595_spi_start();
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writePinLow(SHIFTREG_MATRIX_COL_CS);
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matrix_io_delay();
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spi_write(data);
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matrix_io_delay();
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writePinHigh(SHIFTREG_MATRIX_COL_CS);
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sr_74hc595_spi_stop();
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return true;
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}
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/**
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* Set the entire shift register to be full of inactive bits
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*/
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void clearColumns(void) {
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uint8_t value = 0b00000000;
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sr_74hc595_spi_send_byte(value);
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}
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void setColumn(int columnShift, bool test_run) {
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uint8_t columnShiftByte = ((uint8_t)1 << columnShift);
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if(test_run) {
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dprintf("byte sent: %d\n", columnShiftByte);
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}
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sr_74hc595_spi_send_byte(columnShiftByte);
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}
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/*
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* override of the qmk intialization function
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*/
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void matrix_init_custom(void) {
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wait_ms(300);
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spi_init();
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// Set up the initial states for all the row pins
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for (int r = 0; r < SHIFTREG_ROWS; r++) {
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// Note: This needs to use the internal pull down resistors, and atmegas do *not* support that
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setPinInputLow(rowPinsSR[r]);
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}
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// Set the CS to low by default, and specify as an output pin
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writePinHigh(SHIFTREG_MATRIX_COL_CS); // should be high when using SPI?
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setPinOutput(SHIFTREG_MATRIX_COL_CS);
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// Since it's the init, deactivate all the columns. We'll activate once we get to the matrix scan
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clearColumns();
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}
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bool matrix_scan_custom(matrix_row_t current_matrix[]) {
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// respect the semaphore
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if (semaphore_is_locked()) {
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return false;
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}
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// Keep track of if something was modified
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bool matrix_has_changed = false;
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// reset the current matrix, as we'll be updating and comparing to the old matrix
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memset(current_matrix, 0, matrixArraySize);
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bool debug_output = false;
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// Loop through the columns, activating one at a time, and read the rows, and place in the new current_matrix
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for (int c = 0; c < SHIFTREG_COLS; c++) {
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if (debug_output) {
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dprintf("column iteration: %d\n", c);
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}
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setColumn(c, debug_output);
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matrix_io_delay();
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for (int r = 0; r < SHIFTREG_ROWS; r++) {
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current_matrix[r] |= ((readPin(rowPinsSR[r]) ? 1 : 0) << c);
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}
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}
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matrix_has_changed = memcmp(current_matrix, oldMatrix, matrixArraySize) != 0;
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memcpy(oldMatrix, current_matrix, matrixArraySize);
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if (matrix_has_changed) {
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matrix_print();
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}
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// Deactivate all the columns for the next run.
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clearColumns();
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matrix_io_delay();
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return matrix_has_changed;
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}
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