forked from forks/qmk_firmware
Merge branch 'pc98_fix' into overlays
This commit is contained in:
tmk
commit
000f3c4c54
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@ -11,8 +11,8 @@ TARGET_DIR = .
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SRC = keymap.c \
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SRC = keymap.c \
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matrix.c \
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matrix.c \
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led.c \
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led.c \
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command_extra.c \
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protocol/serial_uart.c
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protocol/serial_soft.c
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# protocol/serial_soft.c
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CONFIG_H = config.h
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CONFIG_H = config.h
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@ -60,6 +60,11 @@ http://davy.nyacom.net/kbd98usb/
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PC98 to PS/2
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PC98 to PS/2
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http://www.tsp.ne.jp/~sawada/mago/c_gka98at.htm
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http://www.tsp.ne.jp/~sawada/mago/c_gka98at.htm
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http://www.tsp.ne.jp/~sawada/mago/src/gka98at.asm
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PC98 keyboard commands
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PC98 keyboard commands
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http://www.webtech.co.jp/company/doc/undocumented_mem/io_kb.txt
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http://www.webtech.co.jp/company/doc/undocumented_mem/io_kb.txt
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Inhibit repeating key:
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0x9C, 0x70
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@ -1,43 +0,0 @@
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#include "stdbool.h"
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#include "stdint.h"
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#include "keycode.h"
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#include "serial.h"
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#include "print.h"
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#include "command.h"
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bool command_extra(uint8_t code)
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{
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switch (code) {
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case KC_H:
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case KC_SLASH: /* ? */
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print("\n\n----- Sun converter Help -----\n");
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print("UP: Bell On\n");
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print("DOWN: Bell Off\n");
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print("LEFT: Click On\n");
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print("RIGHT: Click Off\n");
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return false;
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case KC_UP:
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print("Bell On\n");
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serial_send(0x02);
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break;
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case KC_DOWN:
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print("Bell Off\n");
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serial_send(0x03);
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break;
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case KC_LEFT:
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print("Click On\n");
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serial_send(0x0A);
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break;
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case KC_RIGHT:
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print("Click Off\n");
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serial_send(0x0B);
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break;
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case KC_NUMLOCK:
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print("layout\n");
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serial_send(0x0F);
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break;
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default:
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return false;
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}
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return true;
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}
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@ -27,30 +27,22 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
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/* matrix size */
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/* matrix size */
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#define MATRIX_ROWS 16
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#define MATRIX_ROWS 16
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#define MATRIX_COLS 8
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#define MATRIX_COLS 8
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/* To use new keymap framework */
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#define USE_KEYMAP_V2
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/* key combination for command */
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/* key combination for command */
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#define IS_COMMAND() ( \
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#define IS_COMMAND() ( \
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keyboard_report->mods == (MOD_BIT(KC_LALT) | MOD_BIT(KC_RALT)) || \
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host_get_first_key() == KC_CANCEL \
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keyboard_report->mods == (MOD_BIT(KC_LGUI) | MOD_BIT(KC_RGUI)) || \
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keyboard_report->mods == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT)) \
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)
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)
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/* PC98 Serial(USART) configuration
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/* PC98 Reset Port shared with TXD */
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* asynchronous, positive logic, 19200baud, bit order: LSB first
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* 1-start bit, 8-data bit, odd parity, 1-stop bit
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*/
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#define SERIAL_BAUD 19200
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#define SERIAL_PARITY_ODD
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#define SERIAL_BIT_ORDER_LSB
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/* PC98 Reset Port */
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#define PC98_RST_DDR DDRD
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#define PC98_RST_DDR DDRD
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#define PC98_RST_PORT PORTD
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#define PC98_RST_PORT PORTD
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#define PC98_RST_BIT 1
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#define PC98_RST_BIT 3
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/* PC98 Ready Port */
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/* PC98 Ready Port */
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#define PC98_RDY_DDR DDRD
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#define PC98_RDY_DDR DDRD
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#define PC98_RDY_PORT PORTD
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#define PC98_RDY_PORT PORTD
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@ -60,41 +52,75 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
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#define PC98_RTY_PORT PORTD
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#define PC98_RTY_PORT PORTD
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#define PC98_RTY_BIT 5
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#define PC98_RTY_BIT 5
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/*
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* PC98 Serial(USART) configuration
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* asynchronous, positive logic, 19200baud, bit order: LSB first
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* 1-start bit, 8-data bit, odd parity, 1-stop bit
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*/
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/*
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* Software Serial
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*/
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#define SERIAL_SOFT_BAUD 19200
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#define SERIAL_SOFT_PARITY_ODD
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#define SERIAL_SOFT_BIT_ORDER_LSB
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#define SERIAL_SOFT_LOGIC_POSITIVE
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/* RXD Port */
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/* RXD Port */
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#define SERIAL_RXD_DDR DDRD
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#define SERIAL_SOFT_RXD_DDR DDRD
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#define SERIAL_RXD_PORT PORTD
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#define SERIAL_SOFT_RXD_PORT PORTD
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#define SERIAL_RXD_PIN PIND
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#define SERIAL_SOFT_RXD_PIN PIND
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#define SERIAL_RXD_BIT 2
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#define SERIAL_SOFT_RXD_BIT 2
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#define SERIAL_RXD_READ() (SERIAL_RXD_PIN&(1<<SERIAL_RXD_BIT))
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#define SERIAL_SOFT_RXD_READ() (SERIAL_SOFT_RXD_PIN&(1<<SERIAL_SOFT_RXD_BIT))
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/* RXD Interupt */
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/* RXD Interupt */
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#define SERIAL_RXD_VECT INT2_vect
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#define SERIAL_SOFT_RXD_VECT INT2_vect
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#define SERIAL_RXD_INIT() do { \
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#define SERIAL_SOFT_RXD_INIT() do { \
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/* pin configuration: input with pull-up */ \
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/* pin configuration: input with pull-up */ \
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SERIAL_RXD_DDR &= ~(1<<SERIAL_RXD_BIT); \
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SERIAL_SOFT_RXD_DDR &= ~(1<<SERIAL_SOFT_RXD_BIT); \
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SERIAL_RXD_PORT |= (1<<SERIAL_RXD_BIT); \
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SERIAL_SOFT_RXD_PORT |= (1<<SERIAL_SOFT_RXD_BIT); \
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/* enable interrupt: INT2(falling edge) */ \
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/* enable interrupt: INT2(falling edge) */ \
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EICRA |= ((1<<ISC21)|(0<<ISC20)); \
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EICRA |= ((1<<ISC21)|(0<<ISC20)); \
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EIMSK |= (1<<INT2); \
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EIMSK |= (1<<INT2); \
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sei(); \
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} while (0)
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} while (0)
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#define SERIAL_RXD_INT_ENTER()
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#define SERIAL_SOFT_RXD_INT_ENTER()
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#define SERIAL_RXD_INT_EXIT() do { \
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#define SERIAL_SOFT_RXD_INT_EXIT() do { \
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/* clear interrupt flag */ \
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/* clear interrupt flag */ \
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EIFR = (1<<INTF2); \
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EIFR = (1<<INTF2); \
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} while (0)
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/* TXD Port */
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#define SERIAL_SOFT_TXD_DDR DDRD
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#define SERIAL_SOFT_TXD_PORT PORTD
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#define SERIAL_SOFT_TXD_PIN PIND
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#define SERIAL_SOFT_TXD_BIT 3
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#define SERIAL_SOFT_TXD_HI() do { SERIAL_SOFT_TXD_PORT |= (1<<SERIAL_SOFT_TXD_BIT); } while (0)
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#define SERIAL_SOFT_TXD_LO() do { SERIAL_SOFT_TXD_PORT &= ~(1<<SERIAL_SOFT_TXD_BIT); } while (0)
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#define SERIAL_SOFT_TXD_INIT() do { \
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/* pin configuration: output */ \
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SERIAL_SOFT_TXD_DDR |= (1<<SERIAL_SOFT_TXD_BIT); \
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/* idle */ \
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SERIAL_SOFT_TXD_ON(); \
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} while (0)
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} while (0)
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/* TXD Port: Not used */
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#define SERIAL_TXD_DDR DDRD
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/*
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#define SERIAL_TXD_PORT PORTD
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* Hardware Serial(UART)
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#define SERIAL_TXD_PIN PIND
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*/
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#define SERIAL_TXD_BIT 3
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#ifdef __AVR_ATmega32U4__
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/* negative logic */
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#define SERIAL_UART_BAUD 19200
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#define SERIAL_TXD_ON() do { SERIAL_TXD_PORT &= ~(1<<SERIAL_TXD_BIT); } while (0)
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#define SERIAL_UART_DATA UDR1
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#define SERIAL_TXD_OFF() do { SERIAL_TXD_PORT |= (1<<SERIAL_TXD_BIT); } while (0)
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#define SERIAL_UART_UBRR ((F_CPU/(16UL*SERIAL_UART_BAUD))-1)
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#define SERIAL_TXD_INIT() do { \
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#define SERIAL_UART_RXD_VECT USART1_RX_vect
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/* pin configuration: output */ \
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#define SERIAL_UART_TXD_READY (UCSR1A&(1<<UDRE1))
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SERIAL_TXD_DDR |= (1<<SERIAL_TXD_BIT); \
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#define SERIAL_UART_INIT() do { \
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/* idle */ \
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UBRR1L = (uint8_t) SERIAL_UART_UBRR; /* baud rate */ \
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SERIAL_TXD_ON(); \
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UBRR1H = (uint8_t) (SERIAL_UART_UBRR>>8); /* baud rate */ \
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} while (0)
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UCSR1B |= (1<<RXCIE1) | (1<<RXEN1); /* RX interrupt, RX: enable */ \
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UCSR1B |= (0<<TXCIE1) | (1<<TXEN1); /* TX interrupt, TX: enable */ \
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UCSR1C |= (1<<UPM11) | (1<<UPM10); /* parity: none(00), even(01), odd(11) */ \
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sei(); \
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} while(0)
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#else
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#error "USART configuration is needed."
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#endif
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#endif
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#endif
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@ -19,6 +19,9 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
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#include <stdbool.h>
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#include <stdbool.h>
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#include <avr/pgmspace.h>
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#include <avr/pgmspace.h>
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#include "keycode.h"
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#include "keycode.h"
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#include "action.h"
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#include "action_macro.h"
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#include "layer_switch.h"
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#include "util.h"
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#include "util.h"
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#include "keymap.h"
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#include "keymap.h"
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@ -33,7 +36,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
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| 00| 01| 02| 03| 04| 05| 58| 71| 06| 07| 08| 09| 0A| 0E|
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| 00| 01| 02| 03| 04| 05| 58| 71| 06| 07| 08| 09| 0A| 0E|
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|---------------------------------------------------------------|
|
|---------------------------------------------------------------|
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| 0F| 10| 11| 12| 13| 14| 3A | 15| 16| 17| 18| 19| 1C|
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| 0F| 10| 11| 12| 13| 14| 3A | 15| 16| 17| 18| 19| 1C|
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||||||
|---------------------------------------------------------------|
|
|---------------------------------------------------------'. |
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| 74| 20| 21| 22| 23| 24| 3B | 3C | 25| 26| 27| 28| 29| |
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| 74| 20| 21| 22| 23| 24| 3B | 3C | 25| 26| 27| 28| 29| |
|
||||||
|---------------------------------------------------------------|
|
|---------------------------------------------------------------|
|
||||||
| 70| 2A| 2B| 2C| 2D| 2E| 38| 3D | 39| 2F| 30| 31| 32| 33| 70|
|
| 70| 2A| 2B| 2C| 2D| 2E| 38| 3D | 39| 2F| 30| 31| 32| 33| 70|
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||||||
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@ -70,33 +73,6 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
|
||||||
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|
||||||
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|
||||||
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|
||||||
// Assign Fn key(0-7) to a layer to which switch with the Fn key pressed.
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|
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static const uint8_t PROGMEM fn_layer[] = {
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|
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2, // Fn0
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|
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3, // Fn1
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4, // Fn2
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0, // Fn3
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0, // Fn4
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0, // Fn5
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|
||||||
0, // Fn6
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|
||||||
0 // Fn7
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|
||||||
};
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|
||||||
|
|
||||||
// Assign Fn key(0-7) to a keycode sent when release Fn key without use of the layer.
|
|
||||||
// See layer.c for details.
|
|
||||||
static const uint8_t PROGMEM fn_keycode[] = {
|
|
||||||
KC_NO, // Fn0
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|
||||||
KC_SCLN, // Fn1
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|
||||||
KC_SLSH, // Fn2
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|
||||||
KC_NO, // Fn3
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|
||||||
KC_NO, // Fn4
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|
||||||
KC_NO, // Fn5
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|
||||||
KC_NO, // Fn6
|
|
||||||
KC_NO // Fn7
|
|
||||||
};
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|
||||||
|
|
||||||
|
|
||||||
static const uint8_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
|
static const uint8_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
|
||||||
/*
|
/*
|
||||||
,---------------------------------------------------------------.
|
,---------------------------------------------------------------.
|
||||||
|
|
@ -115,73 +91,80 @@ static const uint8_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
|
||||||
`-----------------------------------------------'
|
`-----------------------------------------------'
|
||||||
*/
|
*/
|
||||||
KEYMAP(
|
KEYMAP(
|
||||||
PAUS,COPY, F1, F2, F3, F4, F5, F6, F7, F8, F9, F10, F11, F12, F13, F14,
|
CANCEL,COPY, F1, F2, F3, F4, F5, F6, F7, F8, F9, F10, F11, F12, F13, F14,
|
||||||
ESC, 1, 2, 3, 4, 5, NO, NO, 6, 7, 8, 9, 0, BSPC,
|
ESC, 1, 2, 3, 4, 5, NO, NO, 6, 7, 8, 9, 0, BSPC,
|
||||||
TAB, Q, W, E, R, T, UP, Y, U, I, O, P, ENT,
|
TAB, Q, W, E, R, T, UP, Y, U, I, O, P, ENT,
|
||||||
LCTL, A, S, D, F, G, MINS, EQL, H, J, K, L,SCLN,
|
LCTL, A, S, D, F, G, MINS, EQL, H, J, K, L, FN2,
|
||||||
LSFT, Z, X, C, V, B, INS, DOWN, DEL, N, M,COMM, DOT,SLSH,
|
LSFT, Z, X, C, V, B, INS, DOWN, DEL, N, M,COMM, DOT, FN1,
|
||||||
|
LGUI, LALT, LCTL, LSFT, SPC, SPC, RALT
|
||||||
|
),
|
||||||
|
KEYMAP(
|
||||||
|
PAUS,COPY, F1, F2, F3, F4, F5, F6, F7, F8, F9, F10, F11, F12, F13, F14,
|
||||||
|
GRV, F1, F2, F3, F4, F5, NO, NO, F6, F7, F8, F9, F10, DEL,
|
||||||
|
TAB, Q, W, E, R, T, UP, HOME,PGDN,PGUP, END, P, ENT,
|
||||||
|
LCTL, A, S, D, F, G, MINS, EQL, LEFT,DOWN, UP,RGHT,SCLN,
|
||||||
|
LSFT, Z, X, C, V, B, INS, DOWN, DEL,HOME,PGDN,PGUP, END,TRNS,
|
||||||
|
LGUI, LALT, LCTL, LSFT, SPC, SPC, RALT
|
||||||
|
),
|
||||||
|
KEYMAP(
|
||||||
|
PAUS,COPY, F1, F2, F3, F4, F5, F6, F7, F8, F9, F10, F11, F12, F13, F14,
|
||||||
|
GRV, F1, F2, F3, F4, F5, NO, NO, F6, F7, F8, F9, F10, DEL,
|
||||||
|
TAB, Q, W, E, R, T, UP, WH_L,WH_D,WH_U,WH_R, P, ENT,
|
||||||
|
LCTL, A, S, D, F, G, MINS, EQL, MS_L,MS_D,MS_U,MS_R,TRNS,
|
||||||
|
LSFT, Z, X, C, V, B, INS, DOWN, BTN3,BTN2,BTN1,BTN4,BTN5,TRNS,
|
||||||
LGUI, LALT, LCTL, LSFT, SPC, SPC, RALT
|
LGUI, LALT, LCTL, LSFT, SPC, SPC, RALT
|
||||||
),
|
),
|
||||||
};
|
};
|
||||||
|
|
||||||
|
static const uint8_t PROGMEM overlays[][MATRIX_ROWS][MATRIX_COLS] = {};
|
||||||
|
|
||||||
uint8_t keymap_get_keycode(uint8_t layer, uint8_t row, uint8_t col)
|
static const uint16_t PROGMEM fn_actions[] = {
|
||||||
|
ACTION_KEYMAP_TAP_TOGGLE(0), // FN0
|
||||||
|
ACTION_KEYMAP_TAP_KEY(1, KC_SLASH), // FN1
|
||||||
|
ACTION_KEYMAP_TAP_KEY(2, KC_SCLN), // FN2
|
||||||
|
ACTION_KEYMAP(2), // FN3
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* No need to edit.
|
||||||
|
*/
|
||||||
|
#define KEYMAPS_SIZE (sizeof(keymaps) / sizeof(keymaps[0]))
|
||||||
|
#define OVERLAYS_SIZE (sizeof(overlays) / sizeof(overlays[0]))
|
||||||
|
#define FN_ACTIONS_SIZE (sizeof(fn_actions) / sizeof(fn_actions[0]))
|
||||||
|
|
||||||
|
/* translates key to keycode */
|
||||||
|
uint8_t keymap_key_to_keycode(uint8_t layer, key_t key)
|
||||||
{
|
{
|
||||||
return pgm_read_byte(&keymaps[(layer)][(row)][(col)]);
|
/* Overlay: 16-31(OVERLAY_BIT(0x10) | overlay_layer) */
|
||||||
|
if (layer & OVERLAY_BIT) {
|
||||||
|
layer &= OVERLAY_MASK;
|
||||||
|
if (layer < OVERLAYS_SIZE) {
|
||||||
|
return pgm_read_byte(&overlays[(layer)][(key.row)][(key.col)]);
|
||||||
|
} else {
|
||||||
|
return KC_TRANSPARENT;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/* Keymap: 0-15 */
|
||||||
|
else {
|
||||||
|
if (layer < KEYMAPS_SIZE) {
|
||||||
|
return pgm_read_byte(&keymaps[(layer)][(key.row)][(key.col)]);
|
||||||
|
} else {
|
||||||
|
// fall back to layer 0
|
||||||
|
return pgm_read_byte(&keymaps[0][(key.row)][(key.col)]);
|
||||||
|
}
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t keymap_fn_layer(uint8_t index)
|
/* translates Fn keycode to action */
|
||||||
|
action_t keymap_fn_to_action(uint8_t keycode)
|
||||||
{
|
{
|
||||||
return pgm_read_byte(&fn_layer[index]);
|
action_t action;
|
||||||
|
if (FN_INDEX(keycode) < FN_ACTIONS_SIZE) {
|
||||||
|
action.code = pgm_read_word(&fn_actions[FN_INDEX(keycode)]);
|
||||||
|
} else {
|
||||||
|
action.code = ACTION_NO;
|
||||||
|
}
|
||||||
|
return action;
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t keymap_fn_keycode(uint8_t index)
|
|
||||||
{
|
|
||||||
return pgm_read_byte(&fn_keycode[index]);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
#if 0
|
|
||||||
/* PC-9801-98-S02 Raku Raku keyboard(Luckyboard) M-siki mode
|
|
||||||
,---------------------------------------------------------------.
|
|
||||||
| 60| 61| 62| 63| 64| 65| 66| 67| 68| 69| 6A| 6B| 36| 37| 3F| 3E|
|
|
||||||
`---------------------------------------------------------------'
|
|
||||||
,---------------------------------------------------------------.
|
|
||||||
| 00| 01| 02| 03| 04| 05| NUM|CAPS| 06| 07| 08| 09| 0A| 0E|
|
|
||||||
|---------------------------------------------------------------|
|
|
||||||
| 0F| 10| 25| 20| 23| 2B| 3A | 2F| 15| 13| 11| 19| 1C|
|
|
||||||
|---------------------------------------------------------------|
|
|
||||||
| 74| 12| 16| 17| 1D| 18| 3B | 3C | 24| 1E| 14| 2E| 22| |
|
|
||||||
|---------------------------------------------------------------|
|
|
||||||
| 70| xx| 2A| 2C| xx| xx| 38| 3D | 39| 21| 29| 1F| xx| 2D| 70|
|
|
||||||
`---------------------------------------------------------------'
|
|
||||||
| 73| 51| xx| xx| 34| xx| 35| xx|
|
|
||||||
`-----------------------------------------------'
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define KEYMAP_M( \
|
|
||||||
K60, K61, K62, K63, K64, K65, K66, K67, K68, K69, K6A, K6B, K36, K37, K3F, K3E, \
|
|
||||||
K00, K01, K02, K03, K04, K05, K06, K07, K08, K09, K0A, K0E, \
|
|
||||||
K0F, K10, K25, K23, K20, K2B, K3A, K2F, K15, K13, K11, K19, K1C, \
|
|
||||||
K74, K12, K16, K17, K1D, K18, K3B, K3C, K24, K1E, K14, K2E, K22, \
|
|
||||||
K70, K2A, K2C, K38, K3D, K39, K21, K29, K1F, K2D, \
|
|
||||||
K73, K51, K34, K35 \
|
|
||||||
) { \
|
|
||||||
{ KC_##K00, KC_##K01, KC_##K02, KC_##K03, KC_##K04, KC_##K05, KC_##K06, KC_##K07 }, \
|
|
||||||
{ KC_##K08, KC_##K09, KC_##K0A, KC_NO, KC_NO, KC_NO, KC_##K0E, KC_##K0F }, \
|
|
||||||
{ KC_##K10, KC_##K11, KC_##K12, KC_##K13, KC_##K14, KC_##K15, KC_##K16, KC_##K17 }, \
|
|
||||||
{ KC_##K18, KC_##K19, KC_NO, KC_NO, KC_##K1C, KC_##K1D, KC_##K1E, KC_##K1F }, \
|
|
||||||
{ KC_##K20, KC_##K21, KC_##K22, KC_##K23, KC_##K24, KC_##K25, KC_NO, KC_NO }, \
|
|
||||||
{ KC_NO, KC_##K29, KC_##K2A, KC_##K2B, KC_##K2C, KC_##K2D, KC_##K2E, KC_##K2F }, \
|
|
||||||
{ KC_NO, KC_NO, KC_NO, KC_NO, KC_##K34, KC_##K35, KC_##K36, KC_##K37 }, \
|
|
||||||
{ KC_##K38, KC_##K39, KC_##K3A, KC_##K3B, KC_##K3C, KC_##K3D, KC_##K3E, KC_##K3F }, \
|
|
||||||
{ KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO }, \
|
|
||||||
{ KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO }, \
|
|
||||||
{ KC_NO, KC_##K51, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO }, \
|
|
||||||
{ KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO }, \
|
|
||||||
{ KC_##K60, KC_##K61, KC_##K62, KC_##K63, KC_##K64, KC_##K65, KC_##K66, KC_##K67 }, \
|
|
||||||
{ KC_##K68, KC_##K69, KC_##K6A, KC_##K6B, KC_NO, KC_NO, KC_NO, KC_NO }, \
|
|
||||||
{ KC_##K70, KC_NO, KC_NO, KC_##K73, KC_##K74, KC_NO, KC_NO, KC_NO }, \
|
|
||||||
{ KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO } \
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
|
||||||
|
|
@ -61,11 +61,41 @@ uint8_t matrix_cols(void)
|
||||||
return MATRIX_COLS;
|
return MATRIX_COLS;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void pc98_inhibit_repeat(void)
|
||||||
|
{
|
||||||
|
uint8_t code;
|
||||||
|
|
||||||
|
while (serial_recv()) ;
|
||||||
|
RETRY:
|
||||||
|
PC98_RDY_PORT |= (1<<PC98_RDY_BIT);
|
||||||
|
_delay_ms(500);
|
||||||
|
serial_send(0x9C);
|
||||||
|
|
||||||
|
PC98_RDY_PORT &= ~(1<<PC98_RDY_BIT);
|
||||||
|
_delay_ms(100);
|
||||||
|
while (!(code = serial_recv())) ;
|
||||||
|
print("PC98: send 9C: "); print_hex8(code); print("\n");
|
||||||
|
if (code != 0xFA) goto RETRY;
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
PC98_RDY_PORT |= (1<<PC98_RDY_BIT);
|
||||||
|
_delay_ms(100);
|
||||||
|
serial_send(0x70);
|
||||||
|
|
||||||
|
PC98_RDY_PORT &= ~(1<<PC98_RDY_BIT);
|
||||||
|
_delay_ms(100);
|
||||||
|
//code = serial_recv();
|
||||||
|
while (!(code = serial_recv())) ;
|
||||||
|
print("PC98: send 70: "); print_hex8(code); print("\n");
|
||||||
|
if (code != 0xFA) goto RETRY;
|
||||||
|
}
|
||||||
|
|
||||||
void matrix_init(void)
|
void matrix_init(void)
|
||||||
{
|
{
|
||||||
print_enable = true;
|
print_enable = true;
|
||||||
debug_enable = true;
|
// debug_enable = true;
|
||||||
//debug_matrix = true;
|
// debug_matrix = true;
|
||||||
|
|
||||||
PC98_RST_DDR |= (1<<PC98_RST_BIT);
|
PC98_RST_DDR |= (1<<PC98_RST_BIT);
|
||||||
PC98_RDY_DDR |= (1<<PC98_RDY_BIT);
|
PC98_RDY_DDR |= (1<<PC98_RDY_BIT);
|
||||||
|
|
@ -74,17 +104,21 @@ void matrix_init(void)
|
||||||
PC98_RDY_PORT |= (1<<PC98_RDY_BIT);
|
PC98_RDY_PORT |= (1<<PC98_RDY_BIT);
|
||||||
PC98_RTY_PORT |= (1<<PC98_RTY_BIT);
|
PC98_RTY_PORT |= (1<<PC98_RTY_BIT);
|
||||||
|
|
||||||
DDRD |= 1<<7;
|
|
||||||
|
|
||||||
|
|
||||||
serial_init();
|
serial_init();
|
||||||
|
|
||||||
// PC98 reset
|
// PC98 reset
|
||||||
|
/*
|
||||||
PC98_RST_PORT &= ~(1<<PC98_RST_BIT);
|
PC98_RST_PORT &= ~(1<<PC98_RST_BIT);
|
||||||
_delay_us(15);
|
_delay_us(15);
|
||||||
PC98_RST_PORT |= (1<<PC98_RST_BIT);
|
PC98_RST_PORT |= (1<<PC98_RST_BIT);
|
||||||
_delay_us(13);
|
_delay_us(13);
|
||||||
PC98_RDY_PORT |= (1<<PC98_RDY_BIT);
|
PC98_RDY_PORT &= ~(1<<PC98_RDY_BIT);
|
||||||
|
*/
|
||||||
|
|
||||||
|
_delay_ms(500);
|
||||||
|
pc98_inhibit_repeat();
|
||||||
|
|
||||||
|
|
||||||
// PC98 ready
|
// PC98 ready
|
||||||
PC98_RDY_PORT &= ~(1<<PC98_RDY_BIT);
|
PC98_RDY_PORT &= ~(1<<PC98_RDY_BIT);
|
||||||
|
|
@ -107,7 +141,20 @@ uint8_t matrix_scan(void)
|
||||||
PC98_RDY_PORT &= ~(1<<PC98_RDY_BIT);
|
PC98_RDY_PORT &= ~(1<<PC98_RDY_BIT);
|
||||||
if (code == -1) return 0;
|
if (code == -1) return 0;
|
||||||
|
|
||||||
debug_hex(code); debug(" ");
|
if (code == 0x60) {
|
||||||
|
pc98_inhibit_repeat();
|
||||||
|
|
||||||
|
/*
|
||||||
|
PC98_RDY_PORT |= (1<<PC98_RDY_BIT);
|
||||||
|
_delay_ms(100);
|
||||||
|
serial_send(0x96);
|
||||||
|
PC98_RDY_PORT &= ~(1<<PC98_RDY_BIT);
|
||||||
|
*/
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
print_hex8(code); print(" ");
|
||||||
|
|
||||||
if (code&0x80) {
|
if (code&0x80) {
|
||||||
// break code
|
// break code
|
||||||
|
|
|
||||||
|
|
@ -43,40 +43,46 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
* asynchronous, negative logic, 1200baud, no flow control
|
* asynchronous, negative logic, 1200baud, no flow control
|
||||||
* 1-start bit, 8-data bit, non parity, 1-stop bit
|
* 1-start bit, 8-data bit, non parity, 1-stop bit
|
||||||
*/
|
*/
|
||||||
#define SERIAL_BAUD 1200
|
#define SERIAL_SOFT_BAUD 1200
|
||||||
|
#define SERIAL_SOFT_PARITY_NONE
|
||||||
#define SERIAL_RXD_DDR DDRD
|
#define SERIAL_SOFT_BIT_ORDER_LSB
|
||||||
#define SERIAL_RXD_PORT PORTD
|
#define SERIAL_SOFT_LOGIC_NEGATIVE
|
||||||
#define SERIAL_RXD_PIN PIND
|
/* RXD Port */
|
||||||
#define SERIAL_RXD_BIT 2
|
#define SERIAL_SOFT_RXD_ENABLE
|
||||||
#define SERIAL_RXD_VECT INT2_vect
|
#define SERIAL_SOFT_RXD_DDR DDRD
|
||||||
#define SERIAL_RXD_INIT() do { \
|
#define SERIAL_SOFT_RXD_PORT PORTD
|
||||||
|
#define SERIAL_SOFT_RXD_PIN PIND
|
||||||
|
#define SERIAL_SOFT_RXD_BIT 2
|
||||||
|
#define SERIAL_SOFT_RXD_VECT INT2_vect
|
||||||
|
/* RXD Interupt */
|
||||||
|
#define SERIAL_SOFT_RXD_INIT() do { \
|
||||||
/* pin configuration: input with pull-up */ \
|
/* pin configuration: input with pull-up */ \
|
||||||
SERIAL_RXD_DDR &= ~(1<<SERIAL_RXD_BIT); \
|
SERIAL_SOFT_RXD_DDR &= ~(1<<SERIAL_SOFT_RXD_BIT); \
|
||||||
SERIAL_RXD_PORT |= (1<<SERIAL_RXD_BIT); \
|
SERIAL_SOFT_RXD_PORT |= (1<<SERIAL_SOFT_RXD_BIT); \
|
||||||
/* enable interrupt: INT2(rising edge) */ \
|
/* enable interrupt: INT2(rising edge) */ \
|
||||||
EICRA |= ((1<<ISC21)|(1<<ISC20)); \
|
EICRA |= ((1<<ISC21)|(1<<ISC20)); \
|
||||||
EIMSK |= (1<<INT2); \
|
EIMSK |= (1<<INT2); \
|
||||||
|
sei(); \
|
||||||
} while (0)
|
} while (0)
|
||||||
#define SERIAL_RXD_INT_ENTER()
|
#define SERIAL_SOFT_RXD_INT_ENTER()
|
||||||
#define SERIAL_RXD_INT_EXIT() do { \
|
#define SERIAL_SOFT_RXD_INT_EXIT() do { \
|
||||||
/* clear interrupt flag */ \
|
/* clear interrupt flag */ \
|
||||||
EIFR = (1<<INTF2); \
|
EIFR = (1<<INTF2); \
|
||||||
} while (0)
|
} while (0)
|
||||||
#define SERIAL_RXD_READ() (~SERIAL_RXD_PIN&(1<<SERIAL_RXD_BIT))
|
#define SERIAL_SOFT_RXD_READ() (SERIAL_SOFT_RXD_PIN&(1<<SERIAL_SOFT_RXD_BIT))
|
||||||
|
/* TXD Port */
|
||||||
#define SERIAL_TXD_DDR DDRD
|
#define SERIAL_SOFT_TXD_ENABLE
|
||||||
#define SERIAL_TXD_PORT PORTD
|
#define SERIAL_SOFT_TXD_DDR DDRD
|
||||||
#define SERIAL_TXD_PIN PIND
|
#define SERIAL_SOFT_TXD_PORT PORTD
|
||||||
#define SERIAL_TXD_BIT 3
|
#define SERIAL_SOFT_TXD_PIN PIND
|
||||||
/* negative logic */
|
#define SERIAL_SOFT_TXD_BIT 3
|
||||||
#define SERIAL_TXD_ON() do { SERIAL_TXD_PORT &= ~(1<<SERIAL_TXD_BIT); } while (0)
|
#define SERIAL_SOFT_TXD_HI() do { SERIAL_SOFT_TXD_PORT |= (1<<SERIAL_SOFT_TXD_BIT); } while (0)
|
||||||
#define SERIAL_TXD_OFF() do { SERIAL_TXD_PORT |= (1<<SERIAL_TXD_BIT); } while (0)
|
#define SERIAL_SOFT_TXD_LO() do { SERIAL_SOFT_TXD_PORT &= ~(1<<SERIAL_SOFT_TXD_BIT); } while (0)
|
||||||
#define SERIAL_TXD_INIT() do { \
|
#define SERIAL_SOFT_TXD_INIT() do { \
|
||||||
/* pin configuration: output */ \
|
/* pin configuration: output */ \
|
||||||
SERIAL_TXD_DDR |= (1<<SERIAL_TXD_BIT); \
|
SERIAL_SOFT_TXD_DDR |= (1<<SERIAL_SOFT_TXD_BIT); \
|
||||||
/* idle */ \
|
/* idle */ \
|
||||||
SERIAL_TXD_ON(); \
|
SERIAL_SOFT_TXD_ON(); \
|
||||||
} while (0)
|
} while (0)
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
||||||
|
|
@ -43,12 +43,32 @@ POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Stupid Inefficient Busy-wait Software Serial
|
* Stupid Inefficient Busy-wait Software Serial
|
||||||
* is still useful for negative logic signal like Sun protocol not supported by hardware USART.
|
* which is still useful for negative logic signal like Sun protocol
|
||||||
|
* if it is not supported by hardware UART.
|
||||||
|
*
|
||||||
|
* TODO: delay is not accurate enough. Instruction cycle should be counted and inline assemby is needed.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#define WAIT_US (1000000/SERIAL_BAUD)
|
#define WAIT_US (1000000L/SERIAL_SOFT_BAUD)
|
||||||
|
|
||||||
|
#ifdef SERIAL_SOFT_LOGIC_NEGATIVE
|
||||||
|
#define SERIAL_SOFT_RXD_IN() !(SERIAL_SOFT_RXD_READ())
|
||||||
|
#define SERIAL_SOFT_TXD_ON() SERIAL_SOFT_TXD_LO()
|
||||||
|
#define SERIAL_SOFT_TXD_OFF() SERIAL_SOFT_TXD_HI()
|
||||||
|
#else
|
||||||
|
#define SERIAL_SOFT_RXD_IN() !!(SERIAL_SOFT_RXD_READ())
|
||||||
|
#define SERIAL_SOFT_TXD_ON() SERIAL_SOFT_TXD_HI()
|
||||||
|
#define SERIAL_SOFT_TXD_OFF() SERIAL_SOFT_TXD_LO()
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef SERIAL_SOFT_PARITY_EVEN
|
||||||
|
#define SERIAL_SOFT_PARITY_VAL 0
|
||||||
|
#elif defined(SERIAL_SOFT_PARITY_ODD)
|
||||||
|
#define SERIAL_SOFT_PARITY_VAL 1
|
||||||
|
#endif
|
||||||
|
|
||||||
/* debug for signal timing, see debug pin with oscilloscope */
|
/* debug for signal timing, see debug pin with oscilloscope */
|
||||||
|
#define SERIAL_SOFT_DEBUG
|
||||||
#ifdef SERIAL_SOFT_DEBUG
|
#ifdef SERIAL_SOFT_DEBUG
|
||||||
#define SERIAL_SOFT_DEBUG_INIT() (DDRD |= 1<<7)
|
#define SERIAL_SOFT_DEBUG_INIT() (DDRD |= 1<<7)
|
||||||
#define SERIAL_SOFT_DEBUG_TGL() (PORTD ^= 1<<7)
|
#define SERIAL_SOFT_DEBUG_TGL() (PORTD ^= 1<<7)
|
||||||
|
|
@ -62,8 +82,8 @@ void serial_init(void)
|
||||||
{
|
{
|
||||||
SERIAL_SOFT_DEBUG_INIT();
|
SERIAL_SOFT_DEBUG_INIT();
|
||||||
|
|
||||||
SERIAL_RXD_INIT();
|
SERIAL_SOFT_RXD_INIT();
|
||||||
SERIAL_TXD_INIT();
|
SERIAL_SOFT_TXD_INIT();
|
||||||
}
|
}
|
||||||
|
|
||||||
/* RX ring buffer */
|
/* RX ring buffer */
|
||||||
|
|
@ -100,85 +120,98 @@ int16_t serial_recv2(void)
|
||||||
void serial_send(uint8_t data)
|
void serial_send(uint8_t data)
|
||||||
{
|
{
|
||||||
/* signal state: IDLE: ON, START: OFF, STOP: ON, DATA0: OFF, DATA1: ON */
|
/* signal state: IDLE: ON, START: OFF, STOP: ON, DATA0: OFF, DATA1: ON */
|
||||||
/* start bit */
|
|
||||||
SERIAL_TXD_OFF();
|
|
||||||
_delay_us(WAIT_US);
|
|
||||||
|
|
||||||
#ifdef SERIAL_BIT_ORDER_MSB
|
#ifdef SERIAL_SOFT_BIT_ORDER_MSB
|
||||||
uint8_t mask = 0x80;
|
uint8_t mask = 0x80;
|
||||||
#else
|
#else
|
||||||
uint8_t mask = 0x01;
|
uint8_t mask = 0x01;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
uint8_t parity = 0;
|
||||||
|
|
||||||
|
/* start bit */
|
||||||
|
SERIAL_SOFT_TXD_OFF();
|
||||||
|
_delay_us(WAIT_US);
|
||||||
|
|
||||||
while (mask) {
|
while (mask) {
|
||||||
if (data&mask) { SERIAL_TXD_ON(); } else { SERIAL_TXD_OFF(); }
|
if (data&mask) {
|
||||||
|
SERIAL_SOFT_TXD_ON();
|
||||||
|
parity ^= 1;
|
||||||
|
} else {
|
||||||
|
SERIAL_SOFT_TXD_OFF();
|
||||||
|
}
|
||||||
_delay_us(WAIT_US);
|
_delay_us(WAIT_US);
|
||||||
|
|
||||||
#ifdef SERIAL_BIT_ORDER_MSB
|
#ifdef SERIAL_SOFT_BIT_ORDER_MSB
|
||||||
mask >>= 1;
|
mask >>= 1;
|
||||||
#else
|
#else
|
||||||
mask <<= 1;
|
mask <<= 1;
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#if defined(SERIAL_SOFT_PARITY_EVEN) || defined(SERIAL_SOFT_PARITY_ODD)
|
||||||
|
/* to center of parity bit */
|
||||||
|
if (parity != SERIAL_SOFT_PARITY_VAL) {
|
||||||
|
SERIAL_SOFT_TXD_ON();
|
||||||
|
} else {
|
||||||
|
SERIAL_SOFT_TXD_OFF();
|
||||||
|
}
|
||||||
|
_delay_us(WAIT_US);
|
||||||
|
#endif
|
||||||
|
|
||||||
/* stop bit */
|
/* stop bit */
|
||||||
SERIAL_TXD_ON();
|
SERIAL_SOFT_TXD_ON();
|
||||||
_delay_us(WAIT_US);
|
_delay_us(WAIT_US);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* detect edge of start bit */
|
/* detect edge of start bit */
|
||||||
ISR(SERIAL_RXD_VECT)
|
ISR(SERIAL_SOFT_RXD_VECT)
|
||||||
{
|
{
|
||||||
SERIAL_SOFT_DEBUG_TGL()
|
SERIAL_SOFT_DEBUG_TGL();
|
||||||
SERIAL_RXD_INT_ENTER()
|
SERIAL_SOFT_RXD_INT_ENTER()
|
||||||
|
|
||||||
uint8_t data = 0;
|
uint8_t data = 0;
|
||||||
|
|
||||||
#ifdef SERIAL_BIT_ORDER_MSB
|
#ifdef SERIAL_SOFT_BIT_ORDER_MSB
|
||||||
uint8_t mask = 0x80;
|
uint8_t mask = 0x80;
|
||||||
#else
|
#else
|
||||||
uint8_t mask = 0x01;
|
uint8_t mask = 0x01;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef SERIAL_PARITY_ODD
|
|
||||||
uint8_t parity = 0;
|
uint8_t parity = 0;
|
||||||
#elif defined(SERIAL_PARITY_EVEN)
|
|
||||||
uint8_t parity = 1;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* to center of start bit */
|
/* to center of start bit */
|
||||||
_delay_us(WAIT_US/2);
|
_delay_us(WAIT_US/2);
|
||||||
SERIAL_SOFT_DEBUG_TGL()
|
SERIAL_SOFT_DEBUG_TGL();
|
||||||
do {
|
do {
|
||||||
/* to center of next bit */
|
/* to center of next bit */
|
||||||
_delay_us(WAIT_US);
|
_delay_us(WAIT_US);
|
||||||
|
|
||||||
SERIAL_SOFT_DEBUG_TGL()
|
SERIAL_SOFT_DEBUG_TGL();
|
||||||
if (SERIAL_RXD_READ()) {
|
if (SERIAL_SOFT_RXD_IN()) {
|
||||||
data |= mask;
|
data |= mask;
|
||||||
#if defined(SERIAL_PARITY_EVEN) || defined(SERIAL_PARITY_ODD)
|
|
||||||
parity ^= 1;
|
parity ^= 1;
|
||||||
#endif
|
|
||||||
}
|
}
|
||||||
#ifdef SERIAL_BIT_ORDER_MSB
|
#ifdef SERIAL_SOFT_BIT_ORDER_MSB
|
||||||
mask >>= 1;
|
mask >>= 1;
|
||||||
#else
|
#else
|
||||||
mask <<= 1;
|
mask <<= 1;
|
||||||
#endif
|
#endif
|
||||||
} while (mask);
|
} while (mask);
|
||||||
|
|
||||||
#if defined(SERIAL_PARITY_EVEN) || defined(SERIAL_PARITY_ODD)
|
#if defined(SERIAL_SOFT_PARITY_EVEN) || defined(SERIAL_SOFT_PARITY_ODD)
|
||||||
/* to center of parity bit */
|
/* to center of parity bit */
|
||||||
_delay_us(WAIT_US);
|
_delay_us(WAIT_US);
|
||||||
if (SERIAL_RXD_READ()) { parity ^= 1; }
|
if (SERIAL_SOFT_RXD_IN()) { parity ^= 1; }
|
||||||
SERIAL_SOFT_DEBUG_TGL()
|
SERIAL_SOFT_DEBUG_TGL();
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* to center of stop bit */
|
/* to center of stop bit */
|
||||||
_delay_us(WAIT_US);
|
_delay_us(WAIT_US);
|
||||||
|
|
||||||
uint8_t next = (rbuf_head + 1) % RBUF_SIZE;
|
uint8_t next = (rbuf_head + 1) % RBUF_SIZE;
|
||||||
#if defined(SERIAL_PARITY_EVEN) || defined(SERIAL_PARITY_ODD)
|
#if defined(SERIAL_SOFT_PARITY_EVEN) || defined(SERIAL_SOFT_PARITY_ODD)
|
||||||
if (parity && next != rbuf_tail) {
|
if ((parity == SERIAL_SOFT_PARITY_VAL) && next != rbuf_tail) {
|
||||||
#else
|
#else
|
||||||
if (next != rbuf_tail) {
|
if (next != rbuf_tail) {
|
||||||
#endif
|
#endif
|
||||||
|
|
@ -186,6 +219,6 @@ ISR(SERIAL_RXD_VECT)
|
||||||
rbuf_head = next;
|
rbuf_head = next;
|
||||||
}
|
}
|
||||||
|
|
||||||
SERIAL_RXD_INT_EXIT();
|
SERIAL_SOFT_RXD_INT_EXIT();
|
||||||
SERIAL_SOFT_DEBUG_TGL()
|
SERIAL_SOFT_DEBUG_TGL();
|
||||||
}
|
}
|
||||||
|
|
|
||||||
93
protocol/serial_uart.c
Normal file
93
protocol/serial_uart.c
Normal file
|
|
@ -0,0 +1,93 @@
|
||||||
|
/*
|
||||||
|
Copyright 2013 Jun WAKO <wakojun@gmail.com>
|
||||||
|
|
||||||
|
This software is licensed with a Modified BSD License.
|
||||||
|
All of this is supposed to be Free Software, Open Source, DFSG-free,
|
||||||
|
GPL-compatible, and OK to use in both free and proprietary applications.
|
||||||
|
Additions and corrections to this file are welcome.
|
||||||
|
|
||||||
|
|
||||||
|
Redistribution and use in source and binary forms, with or without
|
||||||
|
modification, are permitted provided that the following conditions are met:
|
||||||
|
|
||||||
|
* Redistributions of source code must retain the above copyright
|
||||||
|
notice, this list of conditions and the following disclaimer.
|
||||||
|
|
||||||
|
* Redistributions in binary form must reproduce the above copyright
|
||||||
|
notice, this list of conditions and the following disclaimer in
|
||||||
|
the documentation and/or other materials provided with the
|
||||||
|
distribution.
|
||||||
|
|
||||||
|
* Neither the name of the copyright holders nor the names of
|
||||||
|
contributors may be used to endorse or promote products derived
|
||||||
|
from this software without specific prior written permission.
|
||||||
|
|
||||||
|
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||||
|
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||||
|
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||||
|
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||||
|
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||||
|
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||||
|
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||||
|
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <stdbool.h>
|
||||||
|
#include <avr/io.h>
|
||||||
|
#include <avr/interrupt.h>
|
||||||
|
#include "serial.h"
|
||||||
|
|
||||||
|
|
||||||
|
void serial_init(void)
|
||||||
|
{
|
||||||
|
SERIAL_UART_INIT();
|
||||||
|
}
|
||||||
|
|
||||||
|
// RX ring buffer
|
||||||
|
#define RBUF_SIZE 8
|
||||||
|
static uint8_t rbuf[RBUF_SIZE];
|
||||||
|
static uint8_t rbuf_head = 0;
|
||||||
|
static uint8_t rbuf_tail = 0;
|
||||||
|
|
||||||
|
uint8_t serial_recv(void)
|
||||||
|
{
|
||||||
|
uint8_t data = 0;
|
||||||
|
if (rbuf_head == rbuf_tail) {
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
data = rbuf[rbuf_tail];
|
||||||
|
rbuf_tail = (rbuf_tail + 1) % RBUF_SIZE;
|
||||||
|
return data;
|
||||||
|
}
|
||||||
|
|
||||||
|
int16_t serial_recv2(void)
|
||||||
|
{
|
||||||
|
uint8_t data = 0;
|
||||||
|
if (rbuf_head == rbuf_tail) {
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
data = rbuf[rbuf_tail];
|
||||||
|
rbuf_tail = (rbuf_tail + 1) % RBUF_SIZE;
|
||||||
|
return data;
|
||||||
|
}
|
||||||
|
|
||||||
|
void serial_send(uint8_t data)
|
||||||
|
{
|
||||||
|
while (!SERIAL_UART_TXD_READY) ;
|
||||||
|
SERIAL_UART_DATA = data;
|
||||||
|
}
|
||||||
|
|
||||||
|
// USART RX complete interrupt
|
||||||
|
ISR(SERIAL_UART_RXD_VECT)
|
||||||
|
{
|
||||||
|
uint8_t next = (rbuf_head + 1) % RBUF_SIZE;
|
||||||
|
if (next != rbuf_tail) {
|
||||||
|
rbuf[rbuf_head] = SERIAL_UART_DATA;
|
||||||
|
rbuf_head = next;
|
||||||
|
}
|
||||||
|
}
|
||||||
Loading…
Reference in a new issue