forked from forks/qmk_firmware
ckled2001: driver naming cleanups (#21890)
This commit is contained in:
parent
eb2db05e8a
commit
35aceab1a4
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@ -16,18 +16,17 @@
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#include "ckled2001-simple.h"
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#include "i2c_master.h"
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#include "wait.h"
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#ifndef CKLED2001_TIMEOUT
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# define CKLED2001_TIMEOUT 100
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#ifndef CKLED2001_I2C_TIMEOUT
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# define CKLED2001_I2C_TIMEOUT 100
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#endif
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#ifndef CKLED2001_PERSISTENCE
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# define CKLED2001_PERSISTENCE 0
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#ifndef CKLED2001_I2C_PERSISTENCE
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# define CKLED2001_I2C_PERSISTENCE 0
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#endif
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#ifndef PHASE_CHANNEL
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# define PHASE_CHANNEL MSKPHASE_12CHANNEL
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#ifndef CKLED2001_PHASE_CHANNEL
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# define CKLED2001_PHASE_CHANNEL CKLED2001_MSKPHASE_12CHANNEL
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#endif
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#ifndef CKLED2001_CURRENT_TUNE
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@ -44,25 +43,25 @@ uint8_t g_twi_transfer_buffer[20];
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// We could optimize this and take out the unused registers from these
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// buffers and the transfers in ckled2001_write_pwm_buffer() but it's
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// probably not worth the extra complexity.
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uint8_t g_pwm_buffer[DRIVER_COUNT][192];
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bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false};
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uint8_t g_pwm_buffer[CKLED2001_DRIVER_COUNT][192];
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bool g_pwm_buffer_update_required[CKLED2001_DRIVER_COUNT] = {false};
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uint8_t g_led_control_registers[DRIVER_COUNT][24] = {0};
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bool g_led_control_registers_update_required[DRIVER_COUNT] = {false};
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uint8_t g_led_control_registers[CKLED2001_DRIVER_COUNT][24] = {0};
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bool g_led_control_registers_update_required[CKLED2001_DRIVER_COUNT] = {false};
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bool ckled2001_write_register(uint8_t addr, uint8_t reg, uint8_t data) {
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// If the transaction fails function returns false.
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g_twi_transfer_buffer[0] = reg;
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g_twi_transfer_buffer[1] = data;
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#if CKLED2001_PERSISTENCE > 0
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for (uint8_t i = 0; i < CKLED2001_PERSISTENCE; i++) {
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, CKLED2001_TIMEOUT) != 0) {
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#if CKLED2001_I2C_PERSISTENCE > 0
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for (uint8_t i = 0; i < CKLED2001_I2C_PERSISTENCE; i++) {
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, CKLED2001_I2C_TIMEOUT) != 0) {
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return false;
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}
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}
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#else
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, CKLED2001_TIMEOUT) != 0) {
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, CKLED2001_I2C_TIMEOUT) != 0) {
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return false;
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}
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#endif
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@ -85,14 +84,14 @@ bool ckled2001_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
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g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j];
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}
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#if CKLED2001_PERSISTENCE > 0
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for (uint8_t i = 0; i < CKLED2001_PERSISTENCE; i++) {
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, CKLED2001_TIMEOUT) != 0) {
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#if CKLED2001_I2C_PERSISTENCE > 0
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for (uint8_t i = 0; i < CKLED2001_I2C_PERSISTENCE; i++) {
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, CKLED2001_I2C_TIMEOUT) != 0) {
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return false;
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}
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}
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#else
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, CKLED2001_TIMEOUT) != 0) {
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, CKLED2001_I2C_TIMEOUT) != 0) {
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return false;
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}
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#endif
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@ -102,48 +101,48 @@ bool ckled2001_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
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void ckled2001_init(uint8_t addr) {
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// Select to function page
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ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE);
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ckled2001_write_register(addr, CKLED2001_REG_CONFIGURE_CMD_PAGE, CKLED2001_FUNCTION_PAGE);
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// Setting LED driver to shutdown mode
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ckled2001_write_register(addr, CONFIGURATION_REG, MSKSW_SHUT_DOWN_MODE);
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ckled2001_write_register(addr, CKLED2001_REG_CONFIGURATION, CKLED2001_MSKSW_SHUT_DOWN_MODE);
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// Setting internal channel pulldown/pullup
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ckled2001_write_register(addr, PDU_REG, MSKSET_CA_CB_CHANNEL);
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ckled2001_write_register(addr, CKLED2001_REG_PDU, CKLED2001_MSKSET_CA_CB_CHANNEL);
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// Select number of scan phase
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ckled2001_write_register(addr, SCAN_PHASE_REG, PHASE_CHANNEL);
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ckled2001_write_register(addr, CKLED2001_REG_SCAN_PHASE, CKLED2001_PHASE_CHANNEL);
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// Setting PWM Delay Phase
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ckled2001_write_register(addr, SLEW_RATE_CONTROL_MODE1_REG, MSKPWM_DELAY_PHASE_ENABLE);
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ckled2001_write_register(addr, CKLED2001_REG_SLEW_RATE_CONTROL_MODE1, CKLED2001_MSKPWM_DELAY_PHASE_ENABLE);
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// Setting Driving/Sinking Channel Slew Rate
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ckled2001_write_register(addr, SLEW_RATE_CONTROL_MODE2_REG, MSKDRIVING_SINKING_CHHANNEL_SLEWRATE_ENABLE);
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ckled2001_write_register(addr, CKLED2001_REG_SLEW_RATE_CONTROL_MODE2, CKLED2001_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_ENABLE);
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// Setting Iref
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ckled2001_write_register(addr, SOFTWARE_SLEEP_REG, MSKSLEEP_DISABLE);
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ckled2001_write_register(addr, CKLED2001_REG_SOFTWARE_SLEEP, CKLED2001_MSKSLEEP_DISABLE);
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// Set LED CONTROL PAGE (Page 0)
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ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_CONTROL_PAGE);
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for (int i = 0; i < LED_CONTROL_ON_OFF_LENGTH; i++) {
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ckled2001_write_register(addr, CKLED2001_REG_CONFIGURE_CMD_PAGE, CKLED2001_LED_CONTROL_PAGE);
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for (int i = 0; i < CKLED2001_LED_CONTROL_ON_OFF_LENGTH; i++) {
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ckled2001_write_register(addr, i, 0x00);
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}
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// Set PWM PAGE (Page 1)
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ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_PWM_PAGE);
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for (int i = 0; i < LED_CURRENT_TUNE_LENGTH; i++) {
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ckled2001_write_register(addr, CKLED2001_REG_CONFIGURE_CMD_PAGE, CKLED2001_LED_PWM_PAGE);
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for (int i = 0; i < CKLED2001_LED_CURRENT_TUNE_LENGTH; i++) {
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ckled2001_write_register(addr, i, 0x00);
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}
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// Set CURRENT PAGE (Page 4)
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uint8_t current_tuen_reg_list[LED_CURRENT_TUNE_LENGTH] = CKLED2001_CURRENT_TUNE;
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ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, CURRENT_TUNE_PAGE);
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for (int i = 0; i < LED_CURRENT_TUNE_LENGTH; i++) {
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ckled2001_write_register(addr, i, current_tuen_reg_list[i]);
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uint8_t current_tune_reg_list[CKLED2001_LED_CURRENT_TUNE_LENGTH] = CKLED2001_CURRENT_TUNE;
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ckled2001_write_register(addr, CKLED2001_REG_CONFIGURE_CMD_PAGE, CKLED2001_CURRENT_TUNE_PAGE);
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for (int i = 0; i < CKLED2001_LED_CURRENT_TUNE_LENGTH; i++) {
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ckled2001_write_register(addr, i, current_tune_reg_list[i]);
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}
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// Enable LEDs ON/OFF
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ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_CONTROL_PAGE);
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for (int i = 0; i < LED_CONTROL_ON_OFF_LENGTH; i++) {
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ckled2001_write_register(addr, CKLED2001_REG_CONFIGURE_CMD_PAGE, CKLED2001_LED_CONTROL_PAGE);
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for (int i = 0; i < CKLED2001_LED_CONTROL_ON_OFF_LENGTH; i++) {
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ckled2001_write_register(addr, i, 0xFF);
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}
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// Select to function page
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ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE);
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ckled2001_write_register(addr, CKLED2001_REG_CONFIGURE_CMD_PAGE, CKLED2001_FUNCTION_PAGE);
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// Setting LED driver to normal mode
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ckled2001_write_register(addr, CONFIGURATION_REG, MSKSW_NORMAL_MODE);
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ckled2001_write_register(addr, CKLED2001_REG_CONFIGURATION, CKLED2001_MSKSW_NORMAL_MODE);
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}
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void ckled2001_set_value(int index, uint8_t value) {
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@ -183,7 +182,7 @@ void ckled2001_set_led_control_register(uint8_t index, bool value) {
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void ckled2001_update_pwm_buffers(uint8_t addr, uint8_t index) {
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if (g_pwm_buffer_update_required[index]) {
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ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_PWM_PAGE);
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ckled2001_write_register(addr, CKLED2001_REG_CONFIGURE_CMD_PAGE, CKLED2001_LED_PWM_PAGE);
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// If any of the transactions fail we risk writing dirty PG0,
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// refresh page 0 just in case.
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@ -196,7 +195,7 @@ void ckled2001_update_pwm_buffers(uint8_t addr, uint8_t index) {
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void ckled2001_update_led_control_registers(uint8_t addr, uint8_t index) {
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if (g_led_control_registers_update_required[index]) {
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ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_CONTROL_PAGE);
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ckled2001_write_register(addr, CKLED2001_REG_CONFIGURE_CMD_PAGE, CKLED2001_LED_CONTROL_PAGE);
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for (int i = 0; i < 24; i++) {
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ckled2001_write_register(addr, i, g_led_control_registers[index][i]);
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}
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@ -206,16 +205,16 @@ void ckled2001_update_led_control_registers(uint8_t addr, uint8_t index) {
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void ckled2001_sw_return_normal(uint8_t addr) {
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// Select to function page
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ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE);
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ckled2001_write_register(addr, CKLED2001_REG_CONFIGURE_CMD_PAGE, CKLED2001_FUNCTION_PAGE);
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// Setting LED driver to normal mode
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ckled2001_write_register(addr, CONFIGURATION_REG, MSKSW_NORMAL_MODE);
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ckled2001_write_register(addr, CKLED2001_REG_CONFIGURATION, CKLED2001_MSKSW_NORMAL_MODE);
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}
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void ckled2001_sw_shutdown(uint8_t addr) {
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// Select to function page
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ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE);
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ckled2001_write_register(addr, CKLED2001_REG_CONFIGURE_CMD_PAGE, CKLED2001_FUNCTION_PAGE);
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// Setting LED driver to shutdown mode
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ckled2001_write_register(addr, CONFIGURATION_REG, MSKSW_SHUT_DOWN_MODE);
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ckled2001_write_register(addr, CKLED2001_REG_CONFIGURATION, CKLED2001_MSKSW_SHUT_DOWN_MODE);
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// Write SW Sleep Register
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ckled2001_write_register(addr, SOFTWARE_SLEEP_REG, MSKSLEEP_ENABLE);
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ckled2001_write_register(addr, CKLED2001_REG_SOFTWARE_SLEEP, CKLED2001_MSKSLEEP_ENABLE);
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}
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@ -20,6 +20,34 @@
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#include <stdbool.h>
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#include "progmem.h"
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// ======== DEPRECATED DEFINES - DO NOT USE ========
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#ifdef DRIVER_COUNT
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# define CKLED2001_DRIVER_COUNT DRIVER_COUNT
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#endif
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#ifdef CKLED2001_TIMEOUT
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# define CKLED2001_I2C_TIMEOUT CKLED2001_TIMEOUT
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#endif
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#ifdef CKLED2001_PERSISTENCE
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# define CKLED2001_I2C_PERSISTENCE CKLED2001_PERSISTENCE
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#endif
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#ifdef PHASE_CHANNEL
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# define CKLED2001_PHASE_CHANNEL PHASE_CHANNEL
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#endif
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#define MSKPHASE_12CHANNEL CKLED2001_MSKPHASE_12CHANNEL
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#define MSKPHASE_11CHANNEL CKLED2001_MSKPHASE_11CHANNEL
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#define MSKPHASE_10CHANNEL CKLED2001_MSKPHASE_10CHANNEL
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#define MSKPHASE_9CHANNEL CKLED2001_MSKPHASE_9CHANNEL
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#define MSKPHASE_8CHANNEL CKLED2001_MSKPHASE_8CHANNEL
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#define MSKPHASE_7CHANNEL CKLED2001_MSKPHASE_7CHANNEL
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#define MSKPHASE_6CHANNEL CKLED2001_MSKPHASE_6CHANNEL
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#define MSKPHASE_5CHANNEL CKLED2001_MSKPHASE_5CHANNEL
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#define MSKPHASE_4CHANNEL CKLED2001_MSKPHASE_4CHANNEL
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#define MSKPHASE_3CHANNEL CKLED2001_MSKPHASE_3CHANNEL
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#define MSKPHASE_2CHANNEL CKLED2001_MSKPHASE_2CHANNEL
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#define MSKPHASE_1CHANNEL CKLED2001_MSKPHASE_1CHANNEL
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// ========
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typedef struct ckled2001_led {
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uint8_t driver : 2;
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uint8_t v;
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@ -47,90 +75,90 @@ void ckled2001_sw_return_normal(uint8_t addr);
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void ckled2001_sw_shutdown(uint8_t addr);
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// Registers Page Define
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#define CONFIGURE_CMD_PAGE 0xFD
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#define LED_CONTROL_PAGE 0x00
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#define LED_PWM_PAGE 0x01
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#define FUNCTION_PAGE 0x03
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#define CURRENT_TUNE_PAGE 0x04
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#define CKLED2001_REG_CONFIGURE_CMD_PAGE 0xFD
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#define CKLED2001_LED_CONTROL_PAGE 0x00
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#define CKLED2001_LED_PWM_PAGE 0x01
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#define CKLED2001_FUNCTION_PAGE 0x03
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#define CKLED2001_CURRENT_TUNE_PAGE 0x04
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// Function Register: address 0x00
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#define CONFIGURATION_REG 0x00
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#define MSKSW_SHUT_DOWN_MODE (0x0 << 0)
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#define MSKSW_NORMAL_MODE (0x1 << 0)
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#define CKLED2001_REG_CONFIGURATION 0x00
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#define CKLED2001_MSKSW_SHUT_DOWN_MODE (0x0 << 0)
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#define CKLED2001_MSKSW_NORMAL_MODE (0x1 << 0)
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#define DRIVER_ID_REG 0x11
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#define CKLED2001_ID 0x8A
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#define CKLED2001_REG_DRIVER_ID 0x11
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#define CKLED2001_DRIVER_ID 0x8A
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#define PDU_REG 0x13
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#define MSKSET_CA_CB_CHANNEL 0xAA
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#define MSKCLR_CA_CB_CHANNEL 0x00
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#define CKLED2001_REG_PDU 0x13
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#define CKLED2001_MSKSET_CA_CB_CHANNEL 0xAA
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#define CKLED2001_MSKCLR_CA_CB_CHANNEL 0x00
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#define SCAN_PHASE_REG 0x14
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#define MSKPHASE_12CHANNEL 0x00
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#define MSKPHASE_11CHANNEL 0x01
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#define MSKPHASE_10CHANNEL 0x02
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#define MSKPHASE_9CHANNEL 0x03
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#define MSKPHASE_8CHANNEL 0x04
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#define MSKPHASE_7CHANNEL 0x05
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#define MSKPHASE_6CHANNEL 0x06
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#define MSKPHASE_5CHANNEL 0x07
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#define MSKPHASE_4CHANNEL 0x08
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#define MSKPHASE_3CHANNEL 0x09
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#define MSKPHASE_2CHANNEL 0x0A
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#define MSKPHASE_1CHANNEL 0x0B
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#define CKLED2001_REG_SCAN_PHASE 0x14
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#define CKLED2001_MSKPHASE_12CHANNEL 0x00
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#define CKLED2001_MSKPHASE_11CHANNEL 0x01
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#define CKLED2001_MSKPHASE_10CHANNEL 0x02
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#define CKLED2001_MSKPHASE_9CHANNEL 0x03
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#define CKLED2001_MSKPHASE_8CHANNEL 0x04
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#define CKLED2001_MSKPHASE_7CHANNEL 0x05
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#define CKLED2001_MSKPHASE_6CHANNEL 0x06
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#define CKLED2001_MSKPHASE_5CHANNEL 0x07
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#define CKLED2001_MSKPHASE_4CHANNEL 0x08
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#define CKLED2001_MSKPHASE_3CHANNEL 0x09
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#define CKLED2001_MSKPHASE_2CHANNEL 0x0A
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#define CKLED2001_MSKPHASE_1CHANNEL 0x0B
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#define SLEW_RATE_CONTROL_MODE1_REG 0x15
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#define MSKPWM_DELAY_PHASE_ENABLE 0x04
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#define MSKPWM_DELAY_PHASE_DISABLE 0x00
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#define CKLED2001_REG_SLEW_RATE_CONTROL_MODE1 0x15
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#define CKLED2001_MSKPWM_DELAY_PHASE_ENABLE 0x04
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#define CKLED2001_MSKPWM_DELAY_PHASE_DISABLE 0x00
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#define SLEW_RATE_CONTROL_MODE2_REG 0x16
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#define MSKDRIVING_SINKING_CHHANNEL_SLEWRATE_ENABLE 0xC0
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#define MSKDRIVING_SINKING_CHHANNEL_SLEWRATE_DISABLE 0x00
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#define CKLED2001_REG_SLEW_RATE_CONTROL_MODE2 0x16
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#define CKLED2001_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_ENABLE 0xC0
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#define CKLED2001_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_DISABLE 0x00
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#define OPEN_SHORT_ENABLE_REG 0x17
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#define MSKOPEN_DETECTION_ENABLE (0x01 << 7)
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#define MSKOPEN_DETECTION_DISABLE (0x00)
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#define CKLED2001_REG_OPEN_SHORT_ENABLE 0x17
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#define CKLED2001_MSKOPEN_DETECTION_ENABLE (0x01 << 7)
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#define CKLED2001_MSKOPEN_DETECTION_DISABLE (0x00)
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#define MSKSHORT_DETECTION_ENABLE (0x01 << 6)
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#define MSKSHORT_DETECTION_DISABLE (0x00)
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#define CKLED2001_MSKSHORT_DETECTION_ENABLE (0x01 << 6)
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#define CKLED2001_MSKSHORT_DETECTION_DISABLE (0x00)
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#define OPEN_SHORT_DUTY_REG 0x18
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#define OPEN_SHORT_FLAG_REG 0x19
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#define CKLED2001_REG_OPEN_SHORT_DUTY 0x18
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#define CKLED2001_REG_OPEN_SHORT_FLAG 0x19
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#define MSKOPEN_DETECTION_INTERRUPT_ENABLE (0x01 << 7)
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#define MSKOPEN_DETECTION_INTERRUPT_DISABLE (0x00)
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#define CKLED2001_MSKOPEN_DETECTION_INTERRUPT_ENABLE (0x01 << 7)
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#define CKLED2001_MSKOPEN_DETECTION_INTERRUPT_DISABLE (0x00)
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#define MSKSHORT_DETECTION_INTERRUPT_ENABLE (0x01 << 6)
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#define MSKSHORT_DETECTION_INTERRUPT_DISABLE (0x00)
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#define CKLED2001_MSKSHORT_DETECTION_INTERRUPT_ENABLE (0x01 << 6)
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#define CKLED2001_MSKSHORT_DETECTION_INTERRUPT_DISABLE (0x00)
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#define SOFTWARE_SLEEP_REG 0x1A
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#define MSKSLEEP_ENABLE 0x02
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#define MSKSLEEP_DISABLE 0x00
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#define CKLED2001_REG_SOFTWARE_SLEEP 0x1A
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#define CKLED2001_MSKSLEEP_ENABLE 0x02
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#define CKLED2001_MSKSLEEP_DISABLE 0x00
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// LED Control Registers
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#define LED_CONTROL_ON_OFF_FIRST_ADDR 0x0
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#define LED_CONTROL_ON_OFF_LAST_ADDR 0x17
|
||||
#define LED_CONTROL_ON_OFF_LENGTH ((LED_CONTROL_ON_OFF_LAST_ADDR - LED_CONTROL_ON_OFF_FIRST_ADDR) + 1)
|
||||
#define CKLED2001_LED_CONTROL_ON_OFF_FIRST_ADDR 0x0
|
||||
#define CKLED2001_LED_CONTROL_ON_OFF_LAST_ADDR 0x17
|
||||
#define CKLED2001_LED_CONTROL_ON_OFF_LENGTH ((CKLED2001_LED_CONTROL_ON_OFF_LAST_ADDR - CKLED2001_LED_CONTROL_ON_OFF_FIRST_ADDR) + 1)
|
||||
|
||||
#define LED_CONTROL_OPEN_FIRST_ADDR 0x18
|
||||
#define LED_CONTROL_OPEN_LAST_ADDR 0x2F
|
||||
#define LED_CONTROL_OPEN_LENGTH ((LED_CONTROL_OPEN_LAST_ADDR - LED_CONTROL_OPEN_FIRST_ADDR) + 1)
|
||||
#define CKLED2001_LED_CONTROL_OPEN_FIRST_ADDR 0x18
|
||||
#define CKLED2001_LED_CONTROL_OPEN_LAST_ADDR 0x2F
|
||||
#define CKLED2001_LED_CONTROL_OPEN_LENGTH ((CKLED2001_LED_CONTROL_OPEN_LAST_ADDR - CKLED2001_LED_CONTROL_OPEN_FIRST_ADDR) + 1)
|
||||
|
||||
#define LED_CONTROL_SHORT_FIRST_ADDR 0x30
|
||||
#define LED_CONTROL_SHORT_LAST_ADDR 0x47
|
||||
#define LED_CONTROL_SHORT_LENGTH ((LED_CONTROL_SHORT_LAST_ADDR - LED_CONTROL_SHORT_FIRST_ADDR) + 1)
|
||||
#define CKLED2001_LED_CONTROL_SHORT_FIRST_ADDR 0x30
|
||||
#define CKLED2001_LED_CONTROL_SHORT_LAST_ADDR 0x47
|
||||
#define CKLED2001_LED_CONTROL_SHORT_LENGTH ((CKLED2001_LED_CONTROL_SHORT_LAST_ADDR - CKLED2001_LED_CONTROL_SHORT_FIRST_ADDR) + 1)
|
||||
|
||||
#define LED_CONTROL_PAGE_LENGTH 0x48
|
||||
#define CKLED2001_LED_CONTROL_PAGE_LENGTH 0x48
|
||||
|
||||
// LED Control Registers
|
||||
#define LED_PWM_FIRST_ADDR 0x00
|
||||
#define LED_PWM_LAST_ADDR 0xBF
|
||||
#define LED_PWM_LENGTH 0xC0
|
||||
#define CKLED2001_LED_PWM_FIRST_ADDR 0x00
|
||||
#define CKLED2001_LED_PWM_LAST_ADDR 0xBF
|
||||
#define CKLED2001_LED_PWM_LENGTH 0xC0
|
||||
|
||||
// Current Tune Registers
|
||||
#define LED_CURRENT_TUNE_FIRST_ADDR 0x00
|
||||
#define LED_CURRENT_TUNE_LAST_ADDR 0x0B
|
||||
#define LED_CURRENT_TUNE_LENGTH 0x0C
|
||||
#define CKLED2001_LED_CURRENT_TUNE_FIRST_ADDR 0x00
|
||||
#define CKLED2001_LED_CURRENT_TUNE_LAST_ADDR 0x0B
|
||||
#define CKLED2001_LED_CURRENT_TUNE_LENGTH 0x0C
|
||||
|
||||
#define A_1 0x00
|
||||
#define A_2 0x01
|
||||
|
@ -334,4 +362,4 @@ void ckled2001_sw_shutdown(uint8_t addr);
|
|||
#define L_13 0xBC
|
||||
#define L_14 0xBD
|
||||
#define L_15 0xBE
|
||||
#define L_16 0xBF
|
||||
#define L_16 0xBF
|
||||
|
|
|
@ -16,18 +16,17 @@
|
|||
|
||||
#include "ckled2001.h"
|
||||
#include "i2c_master.h"
|
||||
#include "wait.h"
|
||||
|
||||
#ifndef CKLED2001_TIMEOUT
|
||||
# define CKLED2001_TIMEOUT 100
|
||||
#ifndef CKLED2001_I2C_TIMEOUT
|
||||
# define CKLED2001_I2C_TIMEOUT 100
|
||||
#endif
|
||||
|
||||
#ifndef CKLED2001_PERSISTENCE
|
||||
# define CKLED2001_PERSISTENCE 0
|
||||
#ifndef CKLED2001_I2C_PERSISTENCE
|
||||
# define CKLED2001_I2C_PERSISTENCE 0
|
||||
#endif
|
||||
|
||||
#ifndef PHASE_CHANNEL
|
||||
# define PHASE_CHANNEL MSKPHASE_12CHANNEL
|
||||
#ifndef CKLED2001_PHASE_CHANNEL
|
||||
# define CKLED2001_PHASE_CHANNEL CKLED2001_MSKPHASE_12CHANNEL
|
||||
#endif
|
||||
|
||||
#ifndef CKLED2001_CURRENT_TUNE
|
||||
|
@ -44,25 +43,25 @@ uint8_t g_twi_transfer_buffer[65];
|
|||
// We could optimize this and take out the unused registers from these
|
||||
// buffers and the transfers in ckled2001_write_pwm_buffer() but it's
|
||||
// probably not worth the extra complexity.
|
||||
uint8_t g_pwm_buffer[DRIVER_COUNT][192];
|
||||
bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false};
|
||||
uint8_t g_pwm_buffer[CKLED2001_DRIVER_COUNT][192];
|
||||
bool g_pwm_buffer_update_required[CKLED2001_DRIVER_COUNT] = {false};
|
||||
|
||||
uint8_t g_led_control_registers[DRIVER_COUNT][24] = {0};
|
||||
bool g_led_control_registers_update_required[DRIVER_COUNT] = {false};
|
||||
uint8_t g_led_control_registers[CKLED2001_DRIVER_COUNT][24] = {0};
|
||||
bool g_led_control_registers_update_required[CKLED2001_DRIVER_COUNT] = {false};
|
||||
|
||||
bool ckled2001_write_register(uint8_t addr, uint8_t reg, uint8_t data) {
|
||||
// If the transaction fails function returns false.
|
||||
g_twi_transfer_buffer[0] = reg;
|
||||
g_twi_transfer_buffer[1] = data;
|
||||
|
||||
#if CKLED2001_PERSISTENCE > 0
|
||||
for (uint8_t i = 0; i < CKLED2001_PERSISTENCE; i++) {
|
||||
if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, CKLED2001_TIMEOUT) != 0) {
|
||||
#if CKLED2001_I2C_PERSISTENCE > 0
|
||||
for (uint8_t i = 0; i < CKLED2001_I2C_PERSISTENCE; i++) {
|
||||
if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, CKLED2001_I2C_TIMEOUT) != 0) {
|
||||
return false;
|
||||
}
|
||||
}
|
||||
#else
|
||||
if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, CKLED2001_TIMEOUT) != 0) {
|
||||
if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, CKLED2001_I2C_TIMEOUT) != 0) {
|
||||
return false;
|
||||
}
|
||||
#endif
|
||||
|
@ -84,14 +83,14 @@ bool ckled2001_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
|
|||
g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j];
|
||||
}
|
||||
|
||||
#if CKLED2001_PERSISTENCE > 0
|
||||
for (uint8_t i = 0; i < CKLED2001_PERSISTENCE; i++) {
|
||||
if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 65, CKLED2001_TIMEOUT) != 0) {
|
||||
#if CKLED2001_I2C_PERSISTENCE > 0
|
||||
for (uint8_t i = 0; i < CKLED2001_I2C_PERSISTENCE; i++) {
|
||||
if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 65, CKLED2001_I2C_TIMEOUT) != 0) {
|
||||
return false;
|
||||
}
|
||||
}
|
||||
#else
|
||||
if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 65, CKLED2001_TIMEOUT) != 0) {
|
||||
if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 65, CKLED2001_I2C_TIMEOUT) != 0) {
|
||||
return false;
|
||||
}
|
||||
#endif
|
||||
|
@ -101,48 +100,48 @@ bool ckled2001_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
|
|||
|
||||
void ckled2001_init(uint8_t addr) {
|
||||
// Select to function page
|
||||
ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE);
|
||||
ckled2001_write_register(addr, CKLED2001_REG_CONFIGURE_CMD_PAGE, CKLED2001_FUNCTION_PAGE);
|
||||
// Setting LED driver to shutdown mode
|
||||
ckled2001_write_register(addr, CONFIGURATION_REG, MSKSW_SHUT_DOWN_MODE);
|
||||
ckled2001_write_register(addr, CKLED2001_REG_CONFIGURATION, CKLED2001_MSKSW_SHUT_DOWN_MODE);
|
||||
// Setting internal channel pulldown/pullup
|
||||
ckled2001_write_register(addr, PDU_REG, MSKSET_CA_CB_CHANNEL);
|
||||
ckled2001_write_register(addr, CKLED2001_REG_PDU, CKLED2001_MSKSET_CA_CB_CHANNEL);
|
||||
// Select number of scan phase
|
||||
ckled2001_write_register(addr, SCAN_PHASE_REG, PHASE_CHANNEL);
|
||||
ckled2001_write_register(addr, CKLED2001_REG_SCAN_PHASE, CKLED2001_PHASE_CHANNEL);
|
||||
// Setting PWM Delay Phase
|
||||
ckled2001_write_register(addr, SLEW_RATE_CONTROL_MODE1_REG, MSKPWM_DELAY_PHASE_ENABLE);
|
||||
ckled2001_write_register(addr, CKLED2001_REG_SLEW_RATE_CONTROL_MODE1, CKLED2001_MSKPWM_DELAY_PHASE_ENABLE);
|
||||
// Setting Driving/Sinking Channel Slew Rate
|
||||
ckled2001_write_register(addr, SLEW_RATE_CONTROL_MODE2_REG, MSKDRIVING_SINKING_CHHANNEL_SLEWRATE_ENABLE);
|
||||
ckled2001_write_register(addr, CKLED2001_REG_SLEW_RATE_CONTROL_MODE2, CKLED2001_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_ENABLE);
|
||||
// Setting Iref
|
||||
ckled2001_write_register(addr, SOFTWARE_SLEEP_REG, MSKSLEEP_DISABLE);
|
||||
ckled2001_write_register(addr, CKLED2001_REG_SOFTWARE_SLEEP, CKLED2001_MSKSLEEP_DISABLE);
|
||||
// Set LED CONTROL PAGE (Page 0)
|
||||
ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_CONTROL_PAGE);
|
||||
for (int i = 0; i < LED_CONTROL_ON_OFF_LENGTH; i++) {
|
||||
ckled2001_write_register(addr, CKLED2001_REG_CONFIGURE_CMD_PAGE, CKLED2001_LED_CONTROL_PAGE);
|
||||
for (int i = 0; i < CKLED2001_LED_CONTROL_ON_OFF_LENGTH; i++) {
|
||||
ckled2001_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
// Set PWM PAGE (Page 1)
|
||||
ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_PWM_PAGE);
|
||||
for (int i = 0; i < LED_CURRENT_TUNE_LENGTH; i++) {
|
||||
ckled2001_write_register(addr, CKLED2001_REG_CONFIGURE_CMD_PAGE, CKLED2001_LED_PWM_PAGE);
|
||||
for (int i = 0; i < CKLED2001_LED_CURRENT_TUNE_LENGTH; i++) {
|
||||
ckled2001_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
// Set CURRENT PAGE (Page 4)
|
||||
uint8_t current_tuen_reg_list[LED_CURRENT_TUNE_LENGTH] = CKLED2001_CURRENT_TUNE;
|
||||
ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, CURRENT_TUNE_PAGE);
|
||||
for (int i = 0; i < LED_CURRENT_TUNE_LENGTH; i++) {
|
||||
ckled2001_write_register(addr, i, current_tuen_reg_list[i]);
|
||||
uint8_t current_tune_reg_list[CKLED2001_LED_CURRENT_TUNE_LENGTH] = CKLED2001_CURRENT_TUNE;
|
||||
ckled2001_write_register(addr, CKLED2001_REG_CONFIGURE_CMD_PAGE, CKLED2001_CURRENT_TUNE_PAGE);
|
||||
for (int i = 0; i < CKLED2001_LED_CURRENT_TUNE_LENGTH; i++) {
|
||||
ckled2001_write_register(addr, i, current_tune_reg_list[i]);
|
||||
}
|
||||
|
||||
// Enable LEDs ON/OFF
|
||||
ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_CONTROL_PAGE);
|
||||
for (int i = 0; i < LED_CONTROL_ON_OFF_LENGTH; i++) {
|
||||
ckled2001_write_register(addr, CKLED2001_REG_CONFIGURE_CMD_PAGE, CKLED2001_LED_CONTROL_PAGE);
|
||||
for (int i = 0; i < CKLED2001_LED_CONTROL_ON_OFF_LENGTH; i++) {
|
||||
ckled2001_write_register(addr, i, 0xFF);
|
||||
}
|
||||
|
||||
// Select to function page
|
||||
ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE);
|
||||
ckled2001_write_register(addr, CKLED2001_REG_CONFIGURE_CMD_PAGE, CKLED2001_FUNCTION_PAGE);
|
||||
// Setting LED driver to normal mode
|
||||
ckled2001_write_register(addr, CONFIGURATION_REG, MSKSW_NORMAL_MODE);
|
||||
ckled2001_write_register(addr, CKLED2001_REG_CONFIGURATION, CKLED2001_MSKSW_NORMAL_MODE);
|
||||
}
|
||||
|
||||
void ckled2001_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) {
|
||||
|
@ -198,7 +197,7 @@ void ckled2001_set_led_control_register(uint8_t index, bool red, bool green, boo
|
|||
|
||||
void ckled2001_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
||||
if (g_pwm_buffer_update_required[index]) {
|
||||
ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_PWM_PAGE);
|
||||
ckled2001_write_register(addr, CKLED2001_REG_CONFIGURE_CMD_PAGE, CKLED2001_LED_PWM_PAGE);
|
||||
|
||||
// If any of the transactions fail we risk writing dirty PG0,
|
||||
// refresh page 0 just in case.
|
||||
|
@ -211,7 +210,7 @@ void ckled2001_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
|||
|
||||
void ckled2001_update_led_control_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_led_control_registers_update_required[index]) {
|
||||
ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_CONTROL_PAGE);
|
||||
ckled2001_write_register(addr, CKLED2001_REG_CONFIGURE_CMD_PAGE, CKLED2001_LED_CONTROL_PAGE);
|
||||
for (int i = 0; i < 24; i++) {
|
||||
ckled2001_write_register(addr, i, g_led_control_registers[index][i]);
|
||||
}
|
||||
|
@ -221,16 +220,16 @@ void ckled2001_update_led_control_registers(uint8_t addr, uint8_t index) {
|
|||
|
||||
void ckled2001_sw_return_normal(uint8_t addr) {
|
||||
// Select to function page
|
||||
ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE);
|
||||
ckled2001_write_register(addr, CKLED2001_REG_CONFIGURE_CMD_PAGE, CKLED2001_FUNCTION_PAGE);
|
||||
// Setting LED driver to normal mode
|
||||
ckled2001_write_register(addr, CONFIGURATION_REG, MSKSW_NORMAL_MODE);
|
||||
ckled2001_write_register(addr, CKLED2001_REG_CONFIGURATION, CKLED2001_MSKSW_NORMAL_MODE);
|
||||
}
|
||||
|
||||
void ckled2001_sw_shutdown(uint8_t addr) {
|
||||
// Select to function page
|
||||
ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE);
|
||||
ckled2001_write_register(addr, CKLED2001_REG_CONFIGURE_CMD_PAGE, CKLED2001_FUNCTION_PAGE);
|
||||
// Setting LED driver to shutdown mode
|
||||
ckled2001_write_register(addr, CONFIGURATION_REG, MSKSW_SHUT_DOWN_MODE);
|
||||
ckled2001_write_register(addr, CKLED2001_REG_CONFIGURATION, CKLED2001_MSKSW_SHUT_DOWN_MODE);
|
||||
// Write SW Sleep Register
|
||||
ckled2001_write_register(addr, SOFTWARE_SLEEP_REG, MSKSLEEP_ENABLE);
|
||||
ckled2001_write_register(addr, CKLED2001_REG_SOFTWARE_SLEEP, CKLED2001_MSKSLEEP_ENABLE);
|
||||
}
|
||||
|
|
|
@ -20,6 +20,34 @@
|
|||
#include <stdbool.h>
|
||||
#include "progmem.h"
|
||||
|
||||
// ======== DEPRECATED DEFINES - DO NOT USE ========
|
||||
#ifdef DRIVER_COUNT
|
||||
# define CKLED2001_DRIVER_COUNT DRIVER_COUNT
|
||||
#endif
|
||||
#ifdef CKLED2001_TIMEOUT
|
||||
# define CKLED2001_I2C_TIMEOUT CKLED2001_TIMEOUT
|
||||
#endif
|
||||
#ifdef CKLED2001_PERSISTENCE
|
||||
# define CKLED2001_I2C_PERSISTENCE CKLED2001_PERSISTENCE
|
||||
#endif
|
||||
#ifdef PHASE_CHANNEL
|
||||
# define CKLED2001_PHASE_CHANNEL PHASE_CHANNEL
|
||||
#endif
|
||||
|
||||
#define MSKPHASE_12CHANNEL CKLED2001_MSKPHASE_12CHANNEL
|
||||
#define MSKPHASE_11CHANNEL CKLED2001_MSKPHASE_11CHANNEL
|
||||
#define MSKPHASE_10CHANNEL CKLED2001_MSKPHASE_10CHANNEL
|
||||
#define MSKPHASE_9CHANNEL CKLED2001_MSKPHASE_9CHANNEL
|
||||
#define MSKPHASE_8CHANNEL CKLED2001_MSKPHASE_8CHANNEL
|
||||
#define MSKPHASE_7CHANNEL CKLED2001_MSKPHASE_7CHANNEL
|
||||
#define MSKPHASE_6CHANNEL CKLED2001_MSKPHASE_6CHANNEL
|
||||
#define MSKPHASE_5CHANNEL CKLED2001_MSKPHASE_5CHANNEL
|
||||
#define MSKPHASE_4CHANNEL CKLED2001_MSKPHASE_4CHANNEL
|
||||
#define MSKPHASE_3CHANNEL CKLED2001_MSKPHASE_3CHANNEL
|
||||
#define MSKPHASE_2CHANNEL CKLED2001_MSKPHASE_2CHANNEL
|
||||
#define MSKPHASE_1CHANNEL CKLED2001_MSKPHASE_1CHANNEL
|
||||
// ========
|
||||
|
||||
typedef struct ckled2001_led {
|
||||
uint8_t driver : 2;
|
||||
uint8_t r;
|
||||
|
@ -49,90 +77,90 @@ void ckled2001_sw_return_normal(uint8_t addr);
|
|||
void ckled2001_sw_shutdown(uint8_t addr);
|
||||
|
||||
// Registers Page Define
|
||||
#define CONFIGURE_CMD_PAGE 0xFD
|
||||
#define LED_CONTROL_PAGE 0x00
|
||||
#define LED_PWM_PAGE 0x01
|
||||
#define FUNCTION_PAGE 0x03
|
||||
#define CURRENT_TUNE_PAGE 0x04
|
||||
#define CKLED2001_REG_CONFIGURE_CMD_PAGE 0xFD
|
||||
#define CKLED2001_LED_CONTROL_PAGE 0x00
|
||||
#define CKLED2001_LED_PWM_PAGE 0x01
|
||||
#define CKLED2001_FUNCTION_PAGE 0x03
|
||||
#define CKLED2001_CURRENT_TUNE_PAGE 0x04
|
||||
|
||||
// Function Register: address 0x00
|
||||
#define CONFIGURATION_REG 0x00
|
||||
#define MSKSW_SHUT_DOWN_MODE (0x0 << 0)
|
||||
#define MSKSW_NORMAL_MODE (0x1 << 0)
|
||||
#define CKLED2001_REG_CONFIGURATION 0x00
|
||||
#define CKLED2001_MSKSW_SHUT_DOWN_MODE (0x0 << 0)
|
||||
#define CKLED2001_MSKSW_NORMAL_MODE (0x1 << 0)
|
||||
|
||||
#define DRIVER_ID_REG 0x11
|
||||
#define CKLED2001_ID 0x8A
|
||||
#define CKLED2001_REG_DRIVER_ID 0x11
|
||||
#define CKLED2001_DRIVER_ID 0x8A
|
||||
|
||||
#define PDU_REG 0x13
|
||||
#define MSKSET_CA_CB_CHANNEL 0xAA
|
||||
#define MSKCLR_CA_CB_CHANNEL 0x00
|
||||
#define CKLED2001_REG_PDU 0x13
|
||||
#define CKLED2001_MSKSET_CA_CB_CHANNEL 0xAA
|
||||
#define CKLED2001_MSKCLR_CA_CB_CHANNEL 0x00
|
||||
|
||||
#define SCAN_PHASE_REG 0x14
|
||||
#define MSKPHASE_12CHANNEL 0x00
|
||||
#define MSKPHASE_11CHANNEL 0x01
|
||||
#define MSKPHASE_10CHANNEL 0x02
|
||||
#define MSKPHASE_9CHANNEL 0x03
|
||||
#define MSKPHASE_8CHANNEL 0x04
|
||||
#define MSKPHASE_7CHANNEL 0x05
|
||||
#define MSKPHASE_6CHANNEL 0x06
|
||||
#define MSKPHASE_5CHANNEL 0x07
|
||||
#define MSKPHASE_4CHANNEL 0x08
|
||||
#define MSKPHASE_3CHANNEL 0x09
|
||||
#define MSKPHASE_2CHANNEL 0x0A
|
||||
#define MSKPHASE_1CHANNEL 0x0B
|
||||
#define CKLED2001_REG_SCAN_PHASE 0x14
|
||||
#define CKLED2001_MSKPHASE_12CHANNEL 0x00
|
||||
#define CKLED2001_MSKPHASE_11CHANNEL 0x01
|
||||
#define CKLED2001_MSKPHASE_10CHANNEL 0x02
|
||||
#define CKLED2001_MSKPHASE_9CHANNEL 0x03
|
||||
#define CKLED2001_MSKPHASE_8CHANNEL 0x04
|
||||
#define CKLED2001_MSKPHASE_7CHANNEL 0x05
|
||||
#define CKLED2001_MSKPHASE_6CHANNEL 0x06
|
||||
#define CKLED2001_MSKPHASE_5CHANNEL 0x07
|
||||
#define CKLED2001_MSKPHASE_4CHANNEL 0x08
|
||||
#define CKLED2001_MSKPHASE_3CHANNEL 0x09
|
||||
#define CKLED2001_MSKPHASE_2CHANNEL 0x0A
|
||||
#define CKLED2001_MSKPHASE_1CHANNEL 0x0B
|
||||
|
||||
#define SLEW_RATE_CONTROL_MODE1_REG 0x15
|
||||
#define MSKPWM_DELAY_PHASE_ENABLE 0x04
|
||||
#define MSKPWM_DELAY_PHASE_DISABLE 0x00
|
||||
#define CKLED2001_REG_SLEW_RATE_CONTROL_MODE1 0x15
|
||||
#define CKLED2001_MSKPWM_DELAY_PHASE_ENABLE 0x04
|
||||
#define CKLED2001_MSKPWM_DELAY_PHASE_DISABLE 0x00
|
||||
|
||||
#define SLEW_RATE_CONTROL_MODE2_REG 0x16
|
||||
#define MSKDRIVING_SINKING_CHHANNEL_SLEWRATE_ENABLE 0xC0
|
||||
#define MSKDRIVING_SINKING_CHHANNEL_SLEWRATE_DISABLE 0x00
|
||||
#define CKLED2001_REG_SLEW_RATE_CONTROL_MODE2 0x16
|
||||
#define CKLED2001_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_ENABLE 0xC0
|
||||
#define CKLED2001_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_DISABLE 0x00
|
||||
|
||||
#define OPEN_SHORT_ENABLE_REG 0x17
|
||||
#define MSKOPEN_DETECTION_ENABLE (0x01 << 7)
|
||||
#define MSKOPEN_DETECTION_DISABLE (0x00)
|
||||
#define CKLED2001_REG_OPEN_SHORT_ENABLE 0x17
|
||||
#define CKLED2001_MSKOPEN_DETECTION_ENABLE (0x01 << 7)
|
||||
#define CKLED2001_MSKOPEN_DETECTION_DISABLE (0x00)
|
||||
|
||||
#define MSKSHORT_DETECTION_ENABLE (0x01 << 6)
|
||||
#define MSKSHORT_DETECTION_DISABLE (0x00)
|
||||
#define CKLED2001_MSKSHORT_DETECTION_ENABLE (0x01 << 6)
|
||||
#define CKLED2001_MSKSHORT_DETECTION_DISABLE (0x00)
|
||||
|
||||
#define OPEN_SHORT_DUTY_REG 0x18
|
||||
#define OPEN_SHORT_FLAG_REG 0x19
|
||||
#define CKLED2001_REG_OPEN_SHORT_DUTY 0x18
|
||||
#define CKLED2001_REG_OPEN_SHORT_FLAG 0x19
|
||||
|
||||
#define MSKOPEN_DETECTION_INTERRUPT_ENABLE (0x01 << 7)
|
||||
#define MSKOPEN_DETECTION_INTERRUPT_DISABLE (0x00)
|
||||
#define CKLED2001_MSKOPEN_DETECTION_INTERRUPT_ENABLE (0x01 << 7)
|
||||
#define CKLED2001_MSKOPEN_DETECTION_INTERRUPT_DISABLE (0x00)
|
||||
|
||||
#define MSKSHORT_DETECTION_INTERRUPT_ENABLE (0x01 << 6)
|
||||
#define MSKSHORT_DETECTION_INTERRUPT_DISABLE (0x00)
|
||||
#define CKLED2001_MSKSHORT_DETECTION_INTERRUPT_ENABLE (0x01 << 6)
|
||||
#define CKLED2001_MSKSHORT_DETECTION_INTERRUPT_DISABLE (0x00)
|
||||
|
||||
#define SOFTWARE_SLEEP_REG 0x1A
|
||||
#define MSKSLEEP_ENABLE 0x02
|
||||
#define MSKSLEEP_DISABLE 0x00
|
||||
#define CKLED2001_REG_SOFTWARE_SLEEP 0x1A
|
||||
#define CKLED2001_MSKSLEEP_ENABLE 0x02
|
||||
#define CKLED2001_MSKSLEEP_DISABLE 0x00
|
||||
|
||||
// LED Control Registers
|
||||
#define LED_CONTROL_ON_OFF_FIRST_ADDR 0x0
|
||||
#define LED_CONTROL_ON_OFF_LAST_ADDR 0x17
|
||||
#define LED_CONTROL_ON_OFF_LENGTH ((LED_CONTROL_ON_OFF_LAST_ADDR - LED_CONTROL_ON_OFF_FIRST_ADDR) + 1)
|
||||
#define CKLED2001_LED_CONTROL_ON_OFF_FIRST_ADDR 0x0
|
||||
#define CKLED2001_LED_CONTROL_ON_OFF_LAST_ADDR 0x17
|
||||
#define CKLED2001_LED_CONTROL_ON_OFF_LENGTH ((CKLED2001_LED_CONTROL_ON_OFF_LAST_ADDR - CKLED2001_LED_CONTROL_ON_OFF_FIRST_ADDR) + 1)
|
||||
|
||||
#define LED_CONTROL_OPEN_FIRST_ADDR 0x18
|
||||
#define LED_CONTROL_OPEN_LAST_ADDR 0x2F
|
||||
#define LED_CONTROL_OPEN_LENGTH ((LED_CONTROL_OPEN_LAST_ADDR - LED_CONTROL_OPEN_FIRST_ADDR) + 1)
|
||||
#define CKLED2001_LED_CONTROL_OPEN_FIRST_ADDR 0x18
|
||||
#define CKLED2001_LED_CONTROL_OPEN_LAST_ADDR 0x2F
|
||||
#define CKLED2001_LED_CONTROL_OPEN_LENGTH ((CKLED2001_LED_CONTROL_OPEN_LAST_ADDR - CKLED2001_LED_CONTROL_OPEN_FIRST_ADDR) + 1)
|
||||
|
||||
#define LED_CONTROL_SHORT_FIRST_ADDR 0x30
|
||||
#define LED_CONTROL_SHORT_LAST_ADDR 0x47
|
||||
#define LED_CONTROL_SHORT_LENGTH ((LED_CONTROL_SHORT_LAST_ADDR - LED_CONTROL_SHORT_FIRST_ADDR) + 1)
|
||||
#define CKLED2001_LED_CONTROL_SHORT_FIRST_ADDR 0x30
|
||||
#define CKLED2001_LED_CONTROL_SHORT_LAST_ADDR 0x47
|
||||
#define CKLED2001_LED_CONTROL_SHORT_LENGTH ((CKLED2001_LED_CONTROL_SHORT_LAST_ADDR - CKLED2001_LED_CONTROL_SHORT_FIRST_ADDR) + 1)
|
||||
|
||||
#define LED_CONTROL_PAGE_LENGTH 0x48
|
||||
#define CKLED2001_LED_CONTROL_PAGE_LENGTH 0x48
|
||||
|
||||
// LED Control Registers
|
||||
#define LED_PWM_FIRST_ADDR 0x00
|
||||
#define LED_PWM_LAST_ADDR 0xBF
|
||||
#define LED_PWM_LENGTH 0xC0
|
||||
#define CKLED2001_LED_PWM_FIRST_ADDR 0x00
|
||||
#define CKLED2001_LED_PWM_LAST_ADDR 0xBF
|
||||
#define CKLED2001_LED_PWM_LENGTH 0xC0
|
||||
|
||||
// Current Tune Registers
|
||||
#define LED_CURRENT_TUNE_FIRST_ADDR 0x00
|
||||
#define LED_CURRENT_TUNE_LAST_ADDR 0x0B
|
||||
#define LED_CURRENT_TUNE_LENGTH 0x0C
|
||||
#define CKLED2001_LED_CURRENT_TUNE_FIRST_ADDR 0x00
|
||||
#define CKLED2001_LED_CURRENT_TUNE_LAST_ADDR 0x0B
|
||||
#define CKLED2001_LED_CURRENT_TUNE_LENGTH 0x0C
|
||||
|
||||
#define A_1 0x00
|
||||
#define A_2 0x01
|
||||
|
@ -336,4 +364,4 @@ void ckled2001_sw_shutdown(uint8_t addr);
|
|||
#define L_13 0xBC
|
||||
#define L_14 0xBD
|
||||
#define L_15 0xBE
|
||||
#define L_16 0xBF
|
||||
#define L_16 0xBF
|
||||
|
|
|
@ -20,7 +20,7 @@
|
|||
// #define MATRIX_UNSELECT_DRIVE_HIGH
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 2
|
||||
#define CKLED2001_DRIVER_COUNT 2
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
#define DRIVER_ADDR_2 0b1110100
|
||||
|
||||
|
@ -29,8 +29,7 @@
|
|||
#define DRIVER_2_LED_TOTAL 39
|
||||
#define RGB_MATRIX_LED_COUNT (DRIVER_1_LED_TOTAL + DRIVER_2_LED_TOTAL)
|
||||
|
||||
/* Scan phase of led driver set as MSKPHASE_9CHANNEL(defined as 0x03 in CKLED2001.h) */
|
||||
#define PHASE_CHANNEL MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_PHASE_CHANNEL CKLED2001_MSKPHASE_9CHANNEL
|
||||
/* Set led driver current */
|
||||
#define CKLED2001_CURRENT_TUNE \
|
||||
{ 0x9D, 0x9D, 0x44, 0x9D, 0x9D, 0x44, 0x9D, 0x9D, 0x44, 0x9D, 0x9D, 0x44 }
|
||||
|
|
|
@ -20,14 +20,13 @@
|
|||
// #define MATRIX_UNSELECT_DRIVE_HIGH
|
||||
|
||||
/* LED Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 1
|
||||
#define CKLED2001_DRIVER_COUNT 1
|
||||
#define DRIVER_ADDR_1 0b1110100
|
||||
|
||||
/* LED Matrix Configuration */
|
||||
#define LED_MATRIX_LED_COUNT 90
|
||||
|
||||
/* Scan phase of led driver set as MSKPHASE_9CHANNEL(defined as 0x03 in CKLED2001.h) */
|
||||
#define PHASE_CHANNEL MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_PHASE_CHANNEL CKLED2001_MSKPHASE_9CHANNEL
|
||||
/* Set led driver current */
|
||||
#define CKLED2001_CURRENT_TUNE \
|
||||
{ 0x9D, 0x9D, 0x44, 0x9D, 0x9D, 0x44, 0x9D, 0x9D, 0x44, 0x9D, 0x9D, 0x44 }
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
#pragma once
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 2
|
||||
#define CKLED2001_DRIVER_COUNT 2
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
#define DRIVER_ADDR_2 0b1110100
|
||||
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
#pragma once
|
||||
|
||||
/* LED Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 1
|
||||
#define CKLED2001_DRIVER_COUNT 1
|
||||
#define DRIVER_ADDR_1 0b1110100
|
||||
|
||||
/* Set LED driver current */
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
#pragma once
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 1
|
||||
#define CKLED2001_DRIVER_COUNT 1
|
||||
#define DRIVER_ADDR_1 0b1110100
|
||||
|
||||
/* RGB Matrix Configuration */
|
||||
|
|
|
@ -17,15 +17,14 @@
|
|||
#pragma once
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 1
|
||||
#define CKLED2001_DRIVER_COUNT 1
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
|
||||
/* RGB Matrix Configuration */
|
||||
#define DRIVER_1_LED_TOTAL 26
|
||||
#define RGB_MATRIX_LED_COUNT DRIVER_1_LED_TOTAL
|
||||
|
||||
/* Scan phase of led driver set as MSKPHASE_9CHANNEL(defined as 0x03 in CKLED2001.h) */
|
||||
#define PHASE_CHANNEL MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_PHASE_CHANNEL CKLED2001_MSKPHASE_9CHANNEL
|
||||
|
||||
/* Enable num-lock LED */
|
||||
#define NUM_LOCK_LED_INDEX 5
|
||||
|
|
|
@ -30,7 +30,7 @@
|
|||
#define DIODE_DIRECTION ROW2COL
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 2
|
||||
#define CKLED2001_DRIVER_COUNT 2
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
#define DRIVER_ADDR_2 0b1110100
|
||||
|
||||
|
@ -41,8 +41,7 @@
|
|||
#define I2C1_TIMINGR_SCLH 15U
|
||||
#define I2C1_TIMINGR_SCLL 51U
|
||||
|
||||
/* Scan phase of led driver set as MSKPHASE_9CHANNEL(defined as 0x03 in CKLED2001.h) */
|
||||
#define PHASE_CHANNEL MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_PHASE_CHANNEL CKLED2001_MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_CURRENT_TUNE \
|
||||
{ 0x98, 0x98, 0x4A, 0x98, 0x98, 0x4A, 0x98, 0x98, 0x4A, 0x98, 0x98, 0x4A }
|
||||
|
||||
|
|
|
@ -27,7 +27,7 @@
|
|||
#define MATRIX_MASKED // actual mask is defined by `matrix_mask` in `q11.c`
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 1
|
||||
#define CKLED2001_DRIVER_COUNT 1
|
||||
#define DRIVER_ADDR_1 0b1110100
|
||||
|
||||
/* Increase I2C speed to 1000 KHz */
|
||||
|
|
|
@ -26,7 +26,7 @@
|
|||
#define DIODE_DIRECTION ROW2COL
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 2
|
||||
#define CKLED2001_DRIVER_COUNT 2
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
#define DRIVER_ADDR_2 0b1110100
|
||||
|
||||
|
|
|
@ -22,12 +22,11 @@
|
|||
#define DIP_SWITCH_MATRIX_GRID { {4, 4} }
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 2
|
||||
#define CKLED2001_DRIVER_COUNT 2
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
#define DRIVER_ADDR_2 0b1110100
|
||||
|
||||
/* Scan phase of led driver set as MSKPHASE_9CHANNEL(defined as 0x03 in CKLED2001.h) */
|
||||
#define PHASE_CHANNEL MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_PHASE_CHANNEL CKLED2001_MSKPHASE_9CHANNEL
|
||||
|
||||
/* Disable DIP switch in matrix data */
|
||||
#define MATRIX_MASKED
|
||||
|
|
|
@ -24,7 +24,7 @@
|
|||
#define DIODE_DIRECTION ROW2COL
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 2
|
||||
#define CKLED2001_DRIVER_COUNT 2
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
#define DRIVER_ADDR_2 0b1110100
|
||||
|
||||
|
@ -35,8 +35,7 @@
|
|||
#define I2C1_TIMINGR_SCLH 15U
|
||||
#define I2C1_TIMINGR_SCLL 51U
|
||||
|
||||
/* Scan phase of led driver set as MSKPHASE_9CHANNEL(defined as 0x03 in CKLED2001.h) */
|
||||
#define PHASE_CHANNEL MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_PHASE_CHANNEL CKLED2001_MSKPHASE_9CHANNEL
|
||||
|
||||
/* DIP switch */
|
||||
#define DIP_SWITCH_MATRIX_GRID { {5, 4} }
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
#pragma once
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 2
|
||||
#define CKLED2001_DRIVER_COUNT 2
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
#define DRIVER_ADDR_2 0b1110100
|
||||
|
||||
|
@ -26,8 +26,7 @@
|
|||
#define DRIVER_2_LED_TOTAL 30
|
||||
#define RGB_MATRIX_LED_COUNT (DRIVER_1_LED_TOTAL + DRIVER_2_LED_TOTAL)
|
||||
|
||||
/* Scan phase of led driver set as MSKPHASE_9CHANNEL(defined as 0x03 in CKLED2001.h) */
|
||||
#define PHASE_CHANNEL MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_PHASE_CHANNEL CKLED2001_MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_CURRENT_TUNE \
|
||||
{ 0xCA, 0xCA, 0x60, 0xCA, 0xCA, 0x60, 0xCA, 0xCA, 0x60, 0xCA, 0xCA, 0x60 }
|
||||
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
#pragma once
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 1
|
||||
#define CKLED2001_DRIVER_COUNT 1
|
||||
#define DRIVER_ADDR_1 0b1110100
|
||||
|
||||
/* RGB Matrix Configuration */
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
#pragma once
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 1
|
||||
#define CKLED2001_DRIVER_COUNT 1
|
||||
#define DRIVER_ADDR_1 0b1110100
|
||||
|
||||
/* RGB Matrix Configuration */
|
||||
|
|
|
@ -30,7 +30,7 @@
|
|||
#define DIODE_DIRECTION ROW2COL
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 2
|
||||
#define CKLED2001_DRIVER_COUNT 2
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
#define DRIVER_ADDR_2 0b1110100
|
||||
|
||||
|
|
|
@ -24,7 +24,7 @@
|
|||
#define DIODE_DIRECTION ROW2COL
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 2
|
||||
#define CKLED2001_DRIVER_COUNT 2
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
#define DRIVER_ADDR_2 0b1110100
|
||||
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
#pragma once
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 1
|
||||
#define CKLED2001_DRIVER_COUNT 1
|
||||
#define DRIVER_ADDR_1 0b1110100
|
||||
|
||||
/* Increase I2C speed to 1000 KHz */
|
||||
|
|
|
@ -26,7 +26,7 @@
|
|||
{ NO_PIN, NO_PIN, NO_PIN, NO_PIN, NO_PIN, NO_PIN, NO_PIN, NO_PIN, A2, A3, A4, A5, A6, A7, B0, B1 }
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 2
|
||||
#define CKLED2001_DRIVER_COUNT 2
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
#define DRIVER_ADDR_2 0b1110100
|
||||
|
||||
|
@ -37,8 +37,7 @@
|
|||
#define I2C1_TIMINGR_SCLH 15U
|
||||
#define I2C1_TIMINGR_SCLL 30U
|
||||
|
||||
/* Scan phase of led driver set as MSKPHASE_9CHANNEL(defined as 0x03 in CKLED2001.h) */
|
||||
#define PHASE_CHANNEL MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_PHASE_CHANNEL CKLED2001_MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_CURRENT_TUNE \
|
||||
{ 0xB8, 0xB8, 0x58, 0xB8, 0xB8, 0x58, 0xB8, 0xB8, 0x58, 0xB8, 0xB8, 0x58 }
|
||||
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
#pragma once
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 2
|
||||
#define CKLED2001_DRIVER_COUNT 2
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
#define DRIVER_ADDR_2 0b1110100
|
||||
|
||||
|
@ -28,8 +28,7 @@
|
|||
#define I2C1_TIMINGR_SCLH 15U
|
||||
#define I2C1_TIMINGR_SCLL 51U
|
||||
|
||||
/* Scan phase of led driver set as MSKPHASE_9CHANNEL(defined as 0x03 in CKLED2001.h) */
|
||||
#define SCAN_PHASE_CHANNEL MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_PHASE_CHANNEL CKLED2001_MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_CURRENT_TUNE \
|
||||
{ 0xF8, 0xF8, 0x80, 0xF8, 0xF8, 0x80, 0xF8, 0xF8, 0x80, 0xF8, 0xF8, 0x80 }
|
||||
|
||||
|
|
|
@ -20,7 +20,7 @@
|
|||
// #define MATRIX_UNSELECT_DRIVE_HIGH
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 2
|
||||
#define CKLED2001_DRIVER_COUNT 2
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
#define DRIVER_ADDR_2 0b1110100
|
||||
|
||||
|
@ -31,8 +31,7 @@
|
|||
#define I2C1_TIMINGR_SCLH 15U
|
||||
#define I2C1_TIMINGR_SCLL 51U
|
||||
|
||||
/* Scan phase of led driver set as MSKPHASE_9CHANNEL(defined as 0x03 in CKLED2001.h) */
|
||||
#define PHASE_CHANNEL MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_PHASE_CHANNEL CKLED2001_MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_CURRENT_TUNE \
|
||||
{ 0xC4, 0xC4, 0x60, 0xC4, 0xC4, 0x60, 0xC4, 0xC4, 0x60, 0xC4, 0xC4, 0x60 }
|
||||
|
||||
|
|
|
@ -23,7 +23,7 @@
|
|||
#define DIP_SWITCH_MATRIX_GRID { { 3, 4 } }
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 1
|
||||
#define CKLED2001_DRIVER_COUNT 1
|
||||
#define DRIVER_ADDR_1 0b1110100
|
||||
|
||||
/* Increase I2C speed to 1000 KHz */
|
||||
|
|
|
@ -17,15 +17,14 @@
|
|||
#pragma once
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 2
|
||||
#define CKLED2001_DRIVER_COUNT 2
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
#define DRIVER_ADDR_2 0b1110100
|
||||
#define DRIVER_1_LED_TOTAL 46
|
||||
#define DRIVER_2_LED_TOTAL 38
|
||||
#define RGB_MATRIX_LED_COUNT (DRIVER_1_LED_TOTAL + DRIVER_2_LED_TOTAL)
|
||||
|
||||
/* Scan phase of led driver set as MSKPHASE_9CHANNEL(defined as 0x03 in CKLED2001.h) */
|
||||
#define PHASE_CHANNEL MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_PHASE_CHANNEL CKLED2001_MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_CURRENT_TUNE \
|
||||
{ 0xA0, 0xA0, 0x48, 0xA0, 0xA0, 0x48, 0xA0, 0xA0, 0x48, 0xA0, 0xA0, 0x48 }
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||||
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||||
|
|
|
@ -17,13 +17,12 @@
|
|||
#pragma once
|
||||
|
||||
/* LED Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 1
|
||||
#define CKLED2001_DRIVER_COUNT 1
|
||||
#define DRIVER_ADDR_1 0b1110100
|
||||
#define DRIVER_1_LED_TOTAL 84
|
||||
#define LED_MATRIX_LED_COUNT DRIVER_1_LED_TOTAL
|
||||
|
||||
/* Scan phase of led driver set as MSKPHASE_9CHANNEL(defined as 0x03 in CKLED2001.h) */
|
||||
#define PHASE_CHANNEL MSKPHASE_6CHANNEL
|
||||
#define CKLED2001_PHASE_CHANNEL CKLED2001_MSKPHASE_6CHANNEL
|
||||
#define CKLED2001_CURRENT_TUNE \
|
||||
{ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80 } // 250mA
|
||||
// { 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40 } // 127mA
|
||||
|
|
|
@ -32,7 +32,7 @@
|
|||
#define DIP_SWITCH_MATRIX_GRID { {5,4} }
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 2
|
||||
#define CKLED2001_DRIVER_COUNT 2
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
#define DRIVER_ADDR_2 0b1110100
|
||||
|
||||
|
@ -43,8 +43,7 @@
|
|||
#define I2C1_TIMINGR_SCLH 15U
|
||||
#define I2C1_TIMINGR_SCLL 51U
|
||||
|
||||
/* Scan phase of led driver set as MSKPHASE_9CHANNEL(defined as 0x03 in CKLED2001.h) */
|
||||
#define PHASE_CHANNEL MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_PHASE_CHANNEL CKLED2001_MSKPHASE_9CHANNEL
|
||||
|
||||
/* turn off effects when suspended */
|
||||
#define RGB_DISABLE_WHEN_USB_SUSPENDED
|
||||
|
|
|
@ -16,11 +16,6 @@
|
|||
|
||||
#pragma once
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 2
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
#define DRIVER_ADDR_2 0b1110100
|
||||
|
||||
/* RGB Matrix Configuration */
|
||||
#define DRIVER_1_LED_TOTAL 46
|
||||
#define DRIVER_2_LED_TOTAL 40
|
||||
|
|
|
@ -31,7 +31,7 @@
|
|||
#define DIODE_DIRECTION ROW2COL
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 2
|
||||
#define CKLED2001_DRIVER_COUNT 2
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
#define DRIVER_ADDR_2 0b1110100
|
||||
|
||||
|
@ -42,8 +42,7 @@
|
|||
#define I2C1_TIMINGR_SCLH 15U
|
||||
#define I2C1_TIMINGR_SCLL 51U
|
||||
|
||||
/* Scan phase of led driver set as MSKPHASE_9CHANNEL(defined as 0x03 in CKLED2001.h) */
|
||||
#define PHASE_CHANNEL MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_PHASE_CHANNEL CKLED2001_MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_CURRENT_TUNE { 0x98, 0x98, 0x4A, 0x98, 0x98, 0x4A, 0x98, 0x98, 0x4A, 0x98, 0x98, 0x4A }
|
||||
|
||||
/* DIP switch */
|
||||
|
|
|
@ -20,7 +20,7 @@
|
|||
// #define MATRIX_UNSELECT_DRIVE_HIGH
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 2
|
||||
#define CKLED2001_DRIVER_COUNT 2
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
#define DRIVER_ADDR_2 0b1110100
|
||||
|
||||
|
@ -31,8 +31,7 @@
|
|||
#define I2C1_TIMINGR_SCLH 15U
|
||||
#define I2C1_TIMINGR_SCLL 51U
|
||||
|
||||
/* Scan phase of led driver set as MSKPHASE_9CHANNEL(defined as 0x03 in CKLED2001.h) */
|
||||
#define PHASE_CHANNEL MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_PHASE_CHANNEL CKLED2001_MSKPHASE_9CHANNEL
|
||||
|
||||
/* Disable DIP switch in matrix data */
|
||||
#define MATRIX_MASKED
|
||||
|
|
|
@ -20,7 +20,7 @@
|
|||
#define DIODE_DIRECTION ROW2COL
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 2
|
||||
#define CKLED2001_DRIVER_COUNT 2
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
#define DRIVER_ADDR_2 0b1110100
|
||||
|
||||
|
@ -31,8 +31,7 @@
|
|||
#define I2C1_TIMINGR_SCLH 15U
|
||||
#define I2C1_TIMINGR_SCLL 51U
|
||||
|
||||
/* Scan phase of led driver set as MSKPHASE_9CHANNEL(defined as 0x03 in CKLED2001.h) */
|
||||
#define PHASE_CHANNEL MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_PHASE_CHANNEL CKLED2001_MSKPHASE_9CHANNEL
|
||||
|
||||
/* DIP switch */
|
||||
#define DIP_SWITCH_MATRIX_GRID { {5, 4} }
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
#pragma once
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 1
|
||||
#define CKLED2001_DRIVER_COUNT 1
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
|
||||
/* Increase I2C speed to 1000 KHz */
|
||||
|
|
|
@ -26,7 +26,7 @@
|
|||
#define DIODE_DIRECTION ROW2COL
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 2
|
||||
#define CKLED2001_DRIVER_COUNT 2
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
#define DRIVER_ADDR_2 0b1110100
|
||||
|
||||
|
|
|
@ -20,7 +20,7 @@
|
|||
#define DIODE_DIRECTION ROW2COL
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 2
|
||||
#define CKLED2001_DRIVER_COUNT 2
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
#define DRIVER_ADDR_2 0b1110100
|
||||
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
#pragma once
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 2
|
||||
#define CKLED2001_DRIVER_COUNT 2
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
#define DRIVER_ADDR_2 0b1110100
|
||||
|
||||
|
@ -28,8 +28,7 @@
|
|||
#define I2C1_TIMINGR_SCLH 15U
|
||||
#define I2C1_TIMINGR_SCLL 51U
|
||||
|
||||
/* Scan phase of led driver set as MSKPHASE_9CHANNEL(defined as 0x03 in CKLED2001.h) */
|
||||
#define SCAN_PHASE_CHANNEL MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_PHASE_CHANNEL CKLED2001_MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_CURRENT_TUNE { 0xFC, 0xFC, 0x70, 0xFC, 0xFC, 0x70, 0xFC, 0xFC, 0x70, 0xFC, 0xFC, 0x70 }
|
||||
|
||||
/* DIP switch */
|
||||
|
|
|
@ -20,7 +20,7 @@
|
|||
// #define MATRIX_UNSELECT_DRIVE_HIGH
|
||||
|
||||
/* RGB Matrix Driver Configuration */
|
||||
#define DRIVER_COUNT 2
|
||||
#define CKLED2001_DRIVER_COUNT 2
|
||||
#define DRIVER_ADDR_1 0b1110111
|
||||
#define DRIVER_ADDR_2 0b1110100
|
||||
|
||||
|
@ -31,8 +31,7 @@
|
|||
#define I2C1_TIMINGR_SCLH 15U
|
||||
#define I2C1_TIMINGR_SCLL 51U
|
||||
|
||||
/* Scan phase of led driver set as MSKPHASE_9CHANNEL(defined as 0x03 in CKLED2001.h) */
|
||||
#define PHASE_CHANNEL MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_PHASE_CHANNEL CKLED2001_MSKPHASE_9CHANNEL
|
||||
#define CKLED2001_CURRENT_TUNE { 0xC4, 0xC4, 0x60, 0xC4, 0xC4, 0x60, 0xC4, 0xC4, 0x60, 0xC4, 0xC4, 0x60 }
|
||||
|
||||
/* DIP switch */
|
||||
|
|
Loading…
Reference in a new issue