forked from forks/qmk_firmware
Merge remote-tracking branch 'origin/master' into develop
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commit
66d56a9480
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@ -114,4 +114,4 @@ void matrix_wait_for_interrupt(void) {
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writePinHigh(col_pins[i]);
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setPinInputHigh(col_pins[i]);
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}
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}
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}
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@ -25,4 +25,4 @@ void usbpd_update(void) {
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kb_state.current_setting = allowance;
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}
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}
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}
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}
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@ -3,7 +3,7 @@
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#pragma once
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// Uncomment the following if your board uses 1.5A and 3.0A hold current fuses.
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//#define DJINN_SUPPORTS_3A_FUSE
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// #define DJINN_SUPPORTS_3A_FUSE
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// Encoder settings
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#define ENCODER_RESOLUTION 2
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@ -60,4 +60,4 @@
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#define ENABLE_RGB_MATRIX_SPLASH
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#define ENABLE_RGB_MATRIX_MULTISPLASH
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#define ENABLE_RGB_MATRIX_SOLID_SPLASH
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#define ENABLE_RGB_MATRIX_SOLID_MULTISPLASH
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#define ENABLE_RGB_MATRIX_SOLID_MULTISPLASH
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@ -3,7 +3,7 @@
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#pragma once
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// Uncomment the following if your board uses 1.5A and 3.0A hold current fuses.
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//#define DJINN_SUPPORTS_3A_FUSE
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// #define DJINN_SUPPORTS_3A_FUSE
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// Encoder settings
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#define ENCODER_RESOLUTION 2
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@ -60,4 +60,4 @@
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#define ENABLE_RGB_MATRIX_SPLASH
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#define ENABLE_RGB_MATRIX_MULTISPLASH
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#define ENABLE_RGB_MATRIX_SOLID_SPLASH
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#define ENABLE_RGB_MATRIX_SOLID_MULTISPLASH
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#define ENABLE_RGB_MATRIX_SOLID_MULTISPLASH
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@ -2,11 +2,10 @@
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// SPDX-License-Identifier: GPL-3.0-or-later
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#pragma once
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// Matrix
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#define MATRIX_SHIFT_REGISTER_COUNT 5
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//#define MATRIX_ROWS 6 // actually defined in info.json: 5 shift registers, plus one row for extras (i.e. encoder pushbutton read)
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//#define MATRIX_COLS 8 // actually defined in info.json: 8 bits per register
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// #define MATRIX_ROWS 6 // actually defined in info.json: 5 shift registers, plus one row for extras (i.e. encoder pushbutton read)
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// #define MATRIX_COLS 8 // actually defined in info.json: 8 bits per register
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// EEPROM configuration
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#define EXTERNAL_EEPROM_BYTE_COUNT 8192
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@ -2,7 +2,6 @@
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// SPDX-License-Identifier: GPL-3.0-or-later
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#pragma once
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// Matrix configuration
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#define SPI_MATRIX_CHIP_SELECT_PIN GP21
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#define SPI_MATRIX_DIVISOR 16
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@ -2,7 +2,6 @@
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// SPDX-License-Identifier: GPL-3.0-or-later
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#pragma once
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// Matrix configuration
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#define SPI_MATRIX_CHIP_SELECT_PIN C4
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#define SPI_MATRIX_DIVISOR 32
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