forked from forks/qmk_firmware
1f2b1dedcc
* Install dependencies before executing unit tests. * Split out UTF-8 decoder. * Fixup python formatting rules. * Add documentation for QGF/QFF and the RLE format used. * Add CLI commands for converting images and fonts. * Add stub rules.mk for QP. * Add stream type. * Add base driver and comms interfaces. * Add support for SPI, SPI+D/C comms drivers. * Include <qp.h> when enabled. * Add base support for SPI+D/C+RST panels, as well as concrete implementation of ST7789. * Add support for GC9A01. * Add support for ILI9341. * Add support for ILI9163. * Add support for SSD1351. * Implement qp_setpixel, including pixdata buffer management. * Implement qp_line. * Implement qp_rect. * Implement qp_circle. * Implement qp_ellipse. * Implement palette interpolation. * Allow for streams to work with either flash or RAM. * Image loading. * Font loading. * QGF palette loading. * Progressive decoder of pixel data supporting Raw+RLE, 1-,2-,4-,8-bpp monochrome and palette-based images. * Image drawing. * Animations. * Font rendering. * Check against 256 colours, dump out the loaded palette if debugging enabled. * Fix build. * AVR is not the intended audience. * `qmk format-c` * Generation fix. * First batch of docs. * More docs and examples. * Review comments. * Public API documentation.
52 lines
1.7 KiB
C
52 lines
1.7 KiB
C
// Copyright 2021 Nick Brassel (@tzarc)
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma once
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#ifdef QUANTUM_PAINTER_SPI_ENABLE
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# include <stdint.h>
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# include "gpio.h"
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# include "qp_internal.h"
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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// Base SPI support
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struct qp_comms_spi_config_t {
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pin_t chip_select_pin;
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uint16_t divisor;
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bool lsb_first;
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int8_t mode;
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};
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bool qp_comms_spi_init(painter_device_t device);
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bool qp_comms_spi_start(painter_device_t device);
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uint32_t qp_comms_spi_send_data(painter_device_t device, const void* data, uint32_t byte_count);
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void qp_comms_spi_stop(painter_device_t device);
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extern const struct painter_comms_vtable_t spi_comms_vtable;
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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// SPI with D/C and RST pins
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# ifdef QUANTUM_PAINTER_SPI_DC_RESET_ENABLE
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struct qp_comms_spi_dc_reset_config_t {
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struct qp_comms_spi_config_t spi_config;
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pin_t dc_pin;
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pin_t reset_pin;
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};
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void qp_comms_spi_dc_reset_send_command(painter_device_t device, uint8_t cmd);
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uint32_t qp_comms_spi_dc_reset_send_data(painter_device_t device, const void* data, uint32_t byte_count);
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void qp_comms_spi_dc_reset_bulk_command_sequence(painter_device_t device, const uint8_t* sequence, size_t sequence_len);
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extern const struct painter_comms_with_command_vtable_t spi_comms_with_dc_vtable;
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# endif // QUANTUM_PAINTER_SPI_DC_RESET_ENABLE
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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#endif // QUANTUM_PAINTER_SPI_ENABLE
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