forked from forks/qmk_firmware
dd887eae36
* [Core] Allow customizing PWM frequency Some frequencies can cause audible noise. Changing the frequency eliminates that. Signed-off-by: Daniel Schaefer <dhs@frame.work> * docs/feature-backlight: Mention PWM frequency Signed-off-by: Daniel Schaefer <dhs@frame.work> --------- Signed-off-by: Daniel Schaefer <dhs@frame.work>
173 lines
6 KiB
C
173 lines
6 KiB
C
/* Copyright 2019
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#ifndef USB_VBUS_PIN
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# define SPLIT_USB_DETECT // Force this on when dedicated pin is not used
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#endif
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#if defined(MCU_RP)
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# define CPU_CLOCK RP_CORE_CLK
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// ChibiOS uses the RP2040 timer peripheral as its real time counter, this timer
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// is monotonic and running at 1MHz.
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# define REALTIME_COUNTER_CLOCK 1000000
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# define USE_GPIOV1
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# define PAL_OUTPUT_TYPE_OPENDRAIN _Static_assert(0, "RP2040 has no Open Drain GPIO configuration, setting this is not possible");
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/* Aliases for GPIO PWM channels - every pin has at least one PWM channel
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* assigned */
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# define RP2040_PWM_CHANNEL_A 1U
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# define RP2040_PWM_CHANNEL_B 2U
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# ifndef BACKLIGHT_PAL_MODE
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# define BACKLIGHT_PAL_MODE (PAL_MODE_ALTERNATE_PWM | PAL_RP_PAD_DRIVE12 | PAL_RP_GPIO_OE)
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# endif
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# define BACKLIGHT_PWM_COUNTER_FREQUENCY 1000000
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# ifndef BACKLIGHT_PWM_PERIOD
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# define BACKLIGHT_PWM_PERIOD BACKLIGHT_PWM_COUNTER_FREQUENCY / 2048
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# endif
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# ifndef AUDIO_PWM_PAL_MODE
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# define AUDIO_PWM_PAL_MODE (PAL_MODE_ALTERNATE_PWM | PAL_RP_PAD_DRIVE12 | PAL_RP_GPIO_OE)
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# endif
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# define AUDIO_PWM_COUNTER_FREQUENCY 500000
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# define usb_lld_endpoint_fields
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# ifndef I2C1_SCL_PAL_MODE
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# define I2C1_SCL_PAL_MODE (PAL_MODE_ALTERNATE_I2C | PAL_RP_PAD_SLEWFAST | PAL_RP_PAD_PUE | PAL_RP_PAD_DRIVE4)
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# endif
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# ifndef I2C1_SDA_PAL_MODE
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# define I2C1_SDA_PAL_MODE (PAL_MODE_ALTERNATE_I2C | PAL_RP_PAD_SLEWFAST | PAL_RP_PAD_PUE | PAL_RP_PAD_DRIVE4)
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# endif
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# define USE_I2CV1_CONTRIB
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# if !defined(I2C1_CLOCK_SPEED)
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# define I2C1_CLOCK_SPEED 400000
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# endif
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# ifndef SPI_SCK_PAL_MODE
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# define SPI_SCK_PAL_MODE (PAL_MODE_ALTERNATE_SPI | PAL_RP_PAD_SLEWFAST | PAL_RP_PAD_DRIVE4)
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# endif
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# ifndef SPI_MOSI_PAL_MODE
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# define SPI_MOSI_PAL_MODE (PAL_MODE_ALTERNATE_SPI | PAL_RP_PAD_SLEWFAST | PAL_RP_PAD_DRIVE4)
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# endif
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# ifndef SPI_MISO_PAL_MODE
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# define SPI_MISO_PAL_MODE (PAL_MODE_ALTERNATE_SPI | PAL_RP_PAD_SLEWFAST | PAL_RP_PAD_DRIVE4)
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# endif
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#endif
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// STM32 compatibility
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#if defined(MCU_STM32)
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# if defined(STM32_CORE_CK)
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# define CPU_CLOCK STM32_CORE_CK
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# else
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# define CPU_CLOCK STM32_SYSCLK
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# endif
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# if defined(STM32F1XX)
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# define USE_GPIOV1
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# define PAL_MODE_ALTERNATE_OPENDRAIN PAL_MODE_STM32_ALTERNATE_OPENDRAIN
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# define PAL_MODE_ALTERNATE_PUSHPULL PAL_MODE_STM32_ALTERNATE_PUSHPULL
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# define AUDIO_PWM_PAL_MODE PAL_MODE_ALTERNATE_PUSHPULL
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# else
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# define PAL_OUTPUT_TYPE_OPENDRAIN PAL_STM32_OTYPE_OPENDRAIN
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# define PAL_OUTPUT_TYPE_PUSHPULL PAL_STM32_OTYPE_PUSHPULL
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# define PAL_OUTPUT_SPEED_HIGHEST PAL_STM32_OSPEED_HIGHEST
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# define PAL_PUPDR_FLOATING PAL_STM32_PUPDR_FLOATING
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# endif
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# if defined(STM32F1XX) || defined(STM32F2XX) || defined(STM32F4XX) || defined(STM32L1XX)
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# define USE_I2CV1
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# endif
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#endif
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// GD32 compatibility
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#if defined(MCU_GD32V)
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# define CPU_CLOCK GD32_SYSCLK
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# if defined(GD32VF103)
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# define USE_GPIOV1
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# define USE_I2CV1
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# define PAL_MODE_ALTERNATE_OPENDRAIN PAL_MODE_GD32_ALTERNATE_OPENDRAIN
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# define PAL_MODE_ALTERNATE_PUSHPULL PAL_MODE_GD32_ALTERNATE_PUSHPULL
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# define AUDIO_PWM_PAL_MODE PAL_MODE_GD32_ALTERNATE_PUSHPULL
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# endif
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#endif
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// WB32 compatibility
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#if defined(MCU_WB32)
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# define CPU_CLOCK WB32_MAINCLK
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# if defined(WB32F3G71xx) || defined(WB32FQ95xx)
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# define PAL_OUTPUT_TYPE_OPENDRAIN PAL_WB32_OTYPE_OPENDRAIN
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# define PAL_OUTPUT_TYPE_PUSHPULL PAL_WB32_OTYPE_PUSHPULL
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# define PAL_OUTPUT_SPEED_HIGHEST PAL_WB32_OSPEED_HIGH
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# define PAL_PUPDR_FLOATING PAL_WB32_PUPDR_FLOATING
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# define SPI_SCK_FLAGS PAL_MODE_ALTERNATE(SPI_SCK_PAL_MODE) | PAL_OUTPUT_TYPE_PUSHPULL | PAL_OUTPUT_SPEED_HIGHEST | PAL_WB32_CURRENT_LEVEL3
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# endif
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#endif
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#if defined(GD32VF103)
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/* This chip has the same API as STM32F103, but uses different names for literally the same thing.
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* As of 4.7.2021 QMK is tailored to use STM32 defines/names, for compatibility sake
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* we just redefine the GD32 names. */
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# include "gd32v_compatibility.h"
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#endif
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// teensy compatibility
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#if defined(MCU_KINETIS)
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# define CPU_CLOCK KINETIS_SYSCLK_FREQUENCY
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# if defined(K20x) || defined(K60x) || defined(KL2x)
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# define USE_I2CV1
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# define USE_I2CV1_CONTRIB // for some reason a bunch of ChibiOS-Contrib boards only have clock_speed
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# define USE_GPIOV1
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# endif
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#endif
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#if defined(MCU_MIMXRT1062)
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# include "clock_config.h"
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# define CPU_CLOCK BOARD_BOOTCLOCKRUN_CORE_CLOCK
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#endif
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#if defined(HT32)
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# define CPU_CLOCK HT32_CK_SYS_FREQUENCY
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# define PAL_MODE_ALTERNATE PAL_HT32_MODE_AF
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# define PAL_OUTPUT_TYPE_OPENDRAIN (PAL_HT32_MODE_OD | PAL_HT32_MODE_DIR)
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# define PAL_OUTPUT_TYPE_PUSHPULL PAL_HT32_MODE_DIR
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# define PAL_OUTPUT_SPEED_HIGHEST 0
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#endif
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#if !defined(REALTIME_COUNTER_CLOCK)
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# define REALTIME_COUNTER_CLOCK CPU_CLOCK
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#endif
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// SPI Fallbacks
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#ifndef SPI_SCK_FLAGS
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# define SPI_SCK_FLAGS PAL_MODE_ALTERNATE(SPI_SCK_PAL_MODE) | PAL_OUTPUT_TYPE_PUSHPULL | PAL_OUTPUT_SPEED_HIGHEST
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#endif
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#ifndef SPI_MOSI_FLAGS
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# define SPI_MOSI_FLAGS PAL_MODE_ALTERNATE(SPI_MOSI_PAL_MODE) | PAL_OUTPUT_TYPE_PUSHPULL | PAL_OUTPUT_SPEED_HIGHEST
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#endif
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#ifndef SPI_MISO_FLAGS
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# define SPI_MISO_FLAGS PAL_MODE_ALTERNATE(SPI_MISO_PAL_MODE) | PAL_OUTPUT_TYPE_PUSHPULL | PAL_OUTPUT_SPEED_HIGHEST
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#endif
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