forked from forks/qmk_firmware
54f907bfe9
Co-authored-by: Nick Brassel <nick@tzarc.org>
132 lines
4 KiB
C
132 lines
4 KiB
C
/*
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* Copyright 2018-2023 Jack Humbert <jack.humb@gmail.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "matrix.h"
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#include <hal_pal.h>
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#include <math.h>
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#include "wait.h"
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// STM32-specific watchdog config calculations
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// timeout = 31.25us * PR * (RL + 1)
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#define _STM32_IWDG_LSI(us) ((us) / 31.25)
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#define STM32_IWDG_PR_US(us) (uint8_t)(log(_STM32_IWDG_LSI(us)) / log(2) - 11)
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#define STM32_IWDG_PR_MS(s) STM32_IWDG_PR_US(s * 1000.0)
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#define STM32_IWDG_PR_S(s) STM32_IWDG_PR_US(s * 1000000.0)
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#define _STM32_IWDG_SCALAR(us) (2 << ((uint8_t)STM32_IWDG_PR_US(us) + 1))
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#define STM32_IWDG_RL_US(us) (uint64_t)(_STM32_IWDG_LSI(us)) / _STM32_IWDG_SCALAR(us)
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#define STM32_IWDG_RL_MS(s) STM32_IWDG_RL_US(s * 1000.0)
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#define STM32_IWDG_RL_S(s) STM32_IWDG_RL_US(s * 1000000.0)
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#if !defined(PLANCK_WATCHDOG_TIMEOUT)
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# define PLANCK_WATCHDOG_TIMEOUT 1.0
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#endif
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/* matrix state(1:on, 0:off) */
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static pin_t matrix_row_pins[MATRIX_ROWS] = MATRIX_ROW_PINS;
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static pin_t matrix_col_pins[MATRIX_COLS] = MATRIX_COL_PINS;
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static matrix_row_t matrix_inverted[MATRIX_COLS];
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void matrix_init_custom(void) {
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// actual matrix setup - cols
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for (int i = 0; i < MATRIX_COLS; i++) {
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gpio_set_pin_output(matrix_col_pins[i]);
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gpio_write_pin_low(matrix_col_pins[i]);
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}
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// rows
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for (int i = 0; i < MATRIX_ROWS; i++) {
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gpio_set_pin_input_low(matrix_row_pins[i]);
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}
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// encoder A & B setup
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gpio_set_pin_input_low(B12);
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gpio_set_pin_input_low(B13);
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#ifndef PLANCK_WATCHDOG_DISABLE
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wdgInit();
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static WDGConfig wdgcfg;
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wdgcfg.pr = STM32_IWDG_PR_S(PLANCK_WATCHDOG_TIMEOUT);
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wdgcfg.rlr = STM32_IWDG_RL_S(PLANCK_WATCHDOG_TIMEOUT);
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wdgcfg.winr = STM32_IWDG_WIN_DISABLED;
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wdgStart(&WDGD1, &wdgcfg);
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#endif
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}
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bool matrix_scan_custom(matrix_row_t current_matrix[]) {
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#ifndef PLANCK_WATCHDOG_DISABLE
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// reset watchdog
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wdgReset(&WDGD1);
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#endif
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bool changed = false;
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// actual matrix
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for (int col = 0; col < MATRIX_COLS; col++) {
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matrix_row_t data = 0;
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// strobe col
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gpio_write_pin_high(matrix_col_pins[col]);
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// need wait to settle pin state
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wait_us(20);
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// read row data
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for (int row = 0; row < MATRIX_ROWS; row++) {
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data |= (gpio_read_pin(matrix_row_pins[row]) << row);
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}
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// unstrobe col
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gpio_write_pin_low(matrix_col_pins[col]);
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if (matrix_inverted[col] != data) {
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matrix_inverted[col] = data;
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}
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}
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for (int row = 0; row < MATRIX_ROWS; row++) {
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matrix_row_t old = current_matrix[row];
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current_matrix[row] = 0;
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for (int col = 0; col < MATRIX_COLS; col++) {
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current_matrix[row] |= ((matrix_inverted[col] & (1 << row) ? 1 : 0) << col);
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}
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changed |= old != current_matrix[row];
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}
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return changed;
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}
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#if defined(ENCODER_ENABLE) || defined(ENCODER_MAP_ENABLE)
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#if !defined(PLANCK_ENCODER_SETTLE_PIN_STATE_DELAY)
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# define PLANCK_ENCODER_SETTLE_PIN_STATE_DELAY 10
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#endif
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void encoder_quadrature_init_pin(uint8_t index, bool pad_b) {
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}
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uint8_t encoder_quadrature_read_pin(uint8_t index, bool pad_b) {
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pin_t col_pin = pad_b ? B13 : B12;
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gpio_set_pin_output(col_pin);
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gpio_write_pin_high(col_pin);
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wait_us(PLANCK_ENCODER_SETTLE_PIN_STATE_DELAY);
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uint8_t ret = gpio_read_pin(matrix_row_pins[index]) ? 0 : 1;
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gpio_set_pin_input_low(col_pin);
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return ret;
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}
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#endif // ENCODER_ENABLE || ENCODER_MAP_ENABLE
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